From 9b3fb00908739ebd8a6684e68110a35e888b62ef Mon Sep 17 00:00:00 2001 From: gatecat Date: Tue, 4 May 2021 14:07:28 +0100 Subject: interchange: Initial global routing implementation Signed-off-by: gatecat --- fpga_interchange/arch.cc | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) (limited to 'fpga_interchange/arch.cc') diff --git a/fpga_interchange/arch.cc b/fpga_interchange/arch.cc index c49a172b..ee462848 100644 --- a/fpga_interchange/arch.cc +++ b/fpga_interchange/arch.cc @@ -479,6 +479,24 @@ IdString Arch::getWireType(WireId wire) const return IdString(chip_info->wire_types[wire_type].name); } +WireCategory Arch::get_wire_category(WireId wire) const +{ + int tile = wire.tile, index = wire.index; + if (tile == -1) { + // Nodal wire + const TileWireRefPOD &wr = chip_info->nodes[wire.index].tile_wires[0]; + tile = wr.tile; + index = wr.index; + } + auto &w2t = chip_info->tiles[tile].tile_wire_to_type; + if (index >= w2t.ssize()) + return WIRE_CAT_GENERAL; + int wire_type = w2t[index]; + if (wire_type == -1) + return WIRE_CAT_GENERAL; + return WireCategory(chip_info->wire_types[wire_type].category); +} + std::vector> Arch::getWireAttrs(WireId wire) const { return {}; } // ----------------------------------------------------------------------- @@ -895,6 +913,8 @@ bool Arch::route() // terminate at a BEL pin. disallow_site_routing = true; + route_globals(); + bool result; if (router == "router1") { result = router1(getCtx(), Router1Cfg(getCtx())); -- cgit v1.2.3