From 77ffdd7fd4e90e0da43e81b1f5e021b08ee64a9f Mon Sep 17 00:00:00 2001 From: Alessandro Comodi Date: Fri, 12 Mar 2021 13:53:09 +0100 Subject: fpga_interchange: tests: add cmake functions Also move all tests in a tests directory Signed-off-by: Alessandro Comodi --- fpga_interchange/examples/lut/Makefile | 8 -------- fpga_interchange/examples/lut/lut.v | 5 ----- fpga_interchange/examples/lut/lut.xdc | 7 ------- fpga_interchange/examples/lut/run.tcl | 14 -------------- 4 files changed, 34 deletions(-) delete mode 100644 fpga_interchange/examples/lut/Makefile delete mode 100644 fpga_interchange/examples/lut/lut.v delete mode 100644 fpga_interchange/examples/lut/lut.xdc delete mode 100644 fpga_interchange/examples/lut/run.tcl (limited to 'fpga_interchange/examples/lut') diff --git a/fpga_interchange/examples/lut/Makefile b/fpga_interchange/examples/lut/Makefile deleted file mode 100644 index 54fc8994..00000000 --- a/fpga_interchange/examples/lut/Makefile +++ /dev/null @@ -1,8 +0,0 @@ -DESIGN := lut -DESIGN_TOP := top -PACKAGE := csg324 - -include ../template.mk - -build/lut.json: lut.v | build - yosys -c run.tcl diff --git a/fpga_interchange/examples/lut/lut.v b/fpga_interchange/examples/lut/lut.v deleted file mode 100644 index ca18e665..00000000 --- a/fpga_interchange/examples/lut/lut.v +++ /dev/null @@ -1,5 +0,0 @@ -module top(input i0, input i1, output o); - -assign o = i0 | i1; - -endmodule diff --git a/fpga_interchange/examples/lut/lut.xdc b/fpga_interchange/examples/lut/lut.xdc deleted file mode 100644 index 4f390f25..00000000 --- a/fpga_interchange/examples/lut/lut.xdc +++ /dev/null @@ -1,7 +0,0 @@ -set_property PACKAGE_PIN N16 [get_ports i0] -set_property PACKAGE_PIN N15 [get_ports i1] -set_property PACKAGE_PIN M17 [get_ports o] - -set_property IOSTANDARD LVCMOS33 [get_ports i0] -set_property IOSTANDARD LVCMOS33 [get_ports i1] -set_property IOSTANDARD LVCMOS33 [get_ports o] diff --git a/fpga_interchange/examples/lut/run.tcl b/fpga_interchange/examples/lut/run.tcl deleted file mode 100644 index 1edd8bb7..00000000 --- a/fpga_interchange/examples/lut/run.tcl +++ /dev/null @@ -1,14 +0,0 @@ -yosys -import - -read_verilog lut.v - -synth_xilinx -nolutram -nowidelut -nosrl -nocarry -nodsp - -# opt_expr -undriven makes sure all nets are driven, if only by the $undef -# net. -opt_expr -undriven -opt_clean - -setundef -zero -params - -write_json build/lut.json -- cgit v1.2.3