From 77ffdd7fd4e90e0da43e81b1f5e021b08ee64a9f Mon Sep 17 00:00:00 2001 From: Alessandro Comodi Date: Fri, 12 Mar 2021 13:53:09 +0100 Subject: fpga_interchange: tests: add cmake functions Also move all tests in a tests directory Signed-off-by: Alessandro Comodi --- fpga_interchange/examples/tests/counter/run.tcl | 15 +++++++++++++++ 1 file changed, 15 insertions(+) create mode 100644 fpga_interchange/examples/tests/counter/run.tcl (limited to 'fpga_interchange/examples/tests/counter/run.tcl') diff --git a/fpga_interchange/examples/tests/counter/run.tcl b/fpga_interchange/examples/tests/counter/run.tcl new file mode 100644 index 00000000..7cd9f10f --- /dev/null +++ b/fpga_interchange/examples/tests/counter/run.tcl @@ -0,0 +1,15 @@ +yosys -import + +read_verilog $::env(SOURCES) + +synth_xilinx -nolutram -nowidelut -nosrl -nocarry -nodsp +techmap -map ../remap.v + +# opt_expr -undriven makes sure all nets are driven, if only by the $undef +# net. +opt_expr -undriven +opt_clean + +setundef -zero -params + +write_json $::env(OUT_JSON) -- cgit v1.2.3 From f52b5b39edf3075fbee7244aabea1a12f6cdc70b Mon Sep 17 00:00:00 2001 From: Alessandro Comodi Date: Mon, 15 Mar 2021 11:02:56 +0100 Subject: fpga_interchange: tests: add techmap optional source file Signed-off-by: Alessandro Comodi --- fpga_interchange/examples/tests/counter/run.tcl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'fpga_interchange/examples/tests/counter/run.tcl') diff --git a/fpga_interchange/examples/tests/counter/run.tcl b/fpga_interchange/examples/tests/counter/run.tcl index 7cd9f10f..ffea3b2e 100644 --- a/fpga_interchange/examples/tests/counter/run.tcl +++ b/fpga_interchange/examples/tests/counter/run.tcl @@ -3,7 +3,7 @@ yosys -import read_verilog $::env(SOURCES) synth_xilinx -nolutram -nowidelut -nosrl -nocarry -nodsp -techmap -map ../remap.v +techmap -map $::env(TECHMAP) # opt_expr -undriven makes sure all nets are driven, if only by the $undef # net. -- cgit v1.2.3