From 22fb2c1548d8451e2247a160e71ca1667022204a Mon Sep 17 00:00:00 2001
From: Keith Rothman <537074+litghost@users.noreply.github.com>
Date: Mon, 22 Mar 2021 17:59:20 -0700
Subject: Enable counter tests and add RAM tests.

Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
---
 fpga_interchange/examples/tests/ram/run.tcl | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)
 create mode 100644 fpga_interchange/examples/tests/ram/run.tcl

(limited to 'fpga_interchange/examples/tests/ram/run.tcl')

diff --git a/fpga_interchange/examples/tests/ram/run.tcl b/fpga_interchange/examples/tests/ram/run.tcl
new file mode 100644
index 00000000..79321139
--- /dev/null
+++ b/fpga_interchange/examples/tests/ram/run.tcl
@@ -0,0 +1,17 @@
+yosys -import
+
+foreach src $::env(SOURCES) {
+    read_verilog $src
+}
+
+synth_xilinx -flatten -nolutram -nowidelut -nosrl -nocarry -nodsp
+techmap -map $::env(TECHMAP)
+
+# opt_expr -undriven makes sure all nets are driven, if only by the $undef
+# net.
+opt_expr -undriven
+opt_clean
+
+setundef -zero -params
+
+write_json $::env(OUT_JSON)
-- 
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