From 77ffdd7fd4e90e0da43e81b1f5e021b08ee64a9f Mon Sep 17 00:00:00 2001 From: Alessandro Comodi Date: Fri, 12 Mar 2021 13:53:09 +0100 Subject: fpga_interchange: tests: add cmake functions Also move all tests in a tests directory Signed-off-by: Alessandro Comodi --- fpga_interchange/examples/tests/wire/CMakeLists.txt | 17 +++++++++++++++++ fpga_interchange/examples/tests/wire/run.tcl | 14 ++++++++++++++ fpga_interchange/examples/tests/wire/wire.v | 5 +++++ fpga_interchange/examples/tests/wire/wire.xdc | 5 +++++ 4 files changed, 41 insertions(+) create mode 100644 fpga_interchange/examples/tests/wire/CMakeLists.txt create mode 100644 fpga_interchange/examples/tests/wire/run.tcl create mode 100644 fpga_interchange/examples/tests/wire/wire.v create mode 100644 fpga_interchange/examples/tests/wire/wire.xdc (limited to 'fpga_interchange/examples/tests/wire') diff --git a/fpga_interchange/examples/tests/wire/CMakeLists.txt b/fpga_interchange/examples/tests/wire/CMakeLists.txt new file mode 100644 index 00000000..7736877f --- /dev/null +++ b/fpga_interchange/examples/tests/wire/CMakeLists.txt @@ -0,0 +1,17 @@ +add_interchange_test( + name wire_basys3 + part xc7a35tcpg236-1 + package cpg236 + tcl run.tcl + xdc wire.xdc + sources wire.v +) + +add_interchange_test( + name wire_arty + part xc7a35tcsg324-1 + package csg324 + tcl run.tcl + xdc wire.xdc + sources wire.v +) diff --git a/fpga_interchange/examples/tests/wire/run.tcl b/fpga_interchange/examples/tests/wire/run.tcl new file mode 100644 index 00000000..b8d0df72 --- /dev/null +++ b/fpga_interchange/examples/tests/wire/run.tcl @@ -0,0 +1,14 @@ +yosys -import + +read_verilog $::env(SOURCES) + +synth_xilinx -nolutram -nowidelut -nosrl -nocarry -nodsp + +# opt_expr -undriven makes sure all nets are driven, if only by the $undef +# net. +opt_expr -undriven +opt_clean + +setundef -zero -params + +write_json $::env(OUT_JSON) diff --git a/fpga_interchange/examples/tests/wire/wire.v b/fpga_interchange/examples/tests/wire/wire.v new file mode 100644 index 00000000..429d05ff --- /dev/null +++ b/fpga_interchange/examples/tests/wire/wire.v @@ -0,0 +1,5 @@ +module top(input i, output o); + +assign o = i; + +endmodule diff --git a/fpga_interchange/examples/tests/wire/wire.xdc b/fpga_interchange/examples/tests/wire/wire.xdc new file mode 100644 index 00000000..c923f0fc --- /dev/null +++ b/fpga_interchange/examples/tests/wire/wire.xdc @@ -0,0 +1,5 @@ +set_property PACKAGE_PIN N16 [get_ports i] +set_property PACKAGE_PIN N15 [get_ports o] + +set_property IOSTANDARD LVCMOS33 [get_ports i] +set_property IOSTANDARD LVCMOS33 [get_ports o] -- cgit v1.2.3 From 490fdb0a1c3bb78856d26be2186e4dca5d3d021f Mon Sep 17 00:00:00 2001 From: Alessandro Comodi Date: Fri, 12 Mar 2021 16:37:00 +0100 Subject: fpga_interchange: cmake: generate only one device family Signed-off-by: Alessandro Comodi --- fpga_interchange/examples/tests/wire/CMakeLists.txt | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'fpga_interchange/examples/tests/wire') diff --git a/fpga_interchange/examples/tests/wire/CMakeLists.txt b/fpga_interchange/examples/tests/wire/CMakeLists.txt index 7736877f..1d3b36ac 100644 --- a/fpga_interchange/examples/tests/wire/CMakeLists.txt +++ b/fpga_interchange/examples/tests/wire/CMakeLists.txt @@ -1,6 +1,6 @@ add_interchange_test( name wire_basys3 - part xc7a35tcpg236-1 + device xc7a50t package cpg236 tcl run.tcl xdc wire.xdc @@ -9,7 +9,7 @@ add_interchange_test( add_interchange_test( name wire_arty - part xc7a35tcsg324-1 + device xc7a50t package csg324 tcl run.tcl xdc wire.xdc -- cgit v1.2.3 From bd2da27e4e35e92ad91145921cf9c7d2c490a9df Mon Sep 17 00:00:00 2001 From: Alessandro Comodi Date: Fri, 12 Mar 2021 19:03:02 +0100 Subject: fpga_interchange: tests: added comment and fixed XDC Signed-off-by: Alessandro Comodi --- fpga_interchange/examples/tests/wire/CMakeLists.txt | 8 ++++---- fpga_interchange/examples/tests/wire/wire.xdc | 5 ----- fpga_interchange/examples/tests/wire/wire_arty.xdc | 5 +++++ fpga_interchange/examples/tests/wire/wire_basys3.xdc | 5 +++++ 4 files changed, 14 insertions(+), 9 deletions(-) delete mode 100644 fpga_interchange/examples/tests/wire/wire.xdc create mode 100644 fpga_interchange/examples/tests/wire/wire_arty.xdc create mode 100644 fpga_interchange/examples/tests/wire/wire_basys3.xdc (limited to 'fpga_interchange/examples/tests/wire') diff --git a/fpga_interchange/examples/tests/wire/CMakeLists.txt b/fpga_interchange/examples/tests/wire/CMakeLists.txt index 1d3b36ac..9af3f0db 100644 --- a/fpga_interchange/examples/tests/wire/CMakeLists.txt +++ b/fpga_interchange/examples/tests/wire/CMakeLists.txt @@ -1,17 +1,17 @@ add_interchange_test( name wire_basys3 - device xc7a50t + device xc7a35t package cpg236 tcl run.tcl - xdc wire.xdc + xdc wire_basys3.xdc sources wire.v ) add_interchange_test( name wire_arty - device xc7a50t + device xc7a35t package csg324 tcl run.tcl - xdc wire.xdc + xdc wire_arty.xdc sources wire.v ) diff --git a/fpga_interchange/examples/tests/wire/wire.xdc b/fpga_interchange/examples/tests/wire/wire.xdc deleted file mode 100644 index c923f0fc..00000000 --- a/fpga_interchange/examples/tests/wire/wire.xdc +++ /dev/null @@ -1,5 +0,0 @@ -set_property PACKAGE_PIN N16 [get_ports i] -set_property PACKAGE_PIN N15 [get_ports o] - -set_property IOSTANDARD LVCMOS33 [get_ports i] -set_property IOSTANDARD LVCMOS33 [get_ports o] diff --git a/fpga_interchange/examples/tests/wire/wire_arty.xdc b/fpga_interchange/examples/tests/wire/wire_arty.xdc new file mode 100644 index 00000000..c923f0fc --- /dev/null +++ b/fpga_interchange/examples/tests/wire/wire_arty.xdc @@ -0,0 +1,5 @@ +set_property PACKAGE_PIN N16 [get_ports i] +set_property PACKAGE_PIN N15 [get_ports o] + +set_property IOSTANDARD LVCMOS33 [get_ports i] +set_property IOSTANDARD LVCMOS33 [get_ports o] diff --git a/fpga_interchange/examples/tests/wire/wire_basys3.xdc b/fpga_interchange/examples/tests/wire/wire_basys3.xdc new file mode 100644 index 00000000..317d5acc --- /dev/null +++ b/fpga_interchange/examples/tests/wire/wire_basys3.xdc @@ -0,0 +1,5 @@ +set_property PACKAGE_PIN V17 [get_ports i] +set_property PACKAGE_PIN U16 [get_ports o] + +set_property IOSTANDARD LVCMOS33 [get_ports i] +set_property IOSTANDARD LVCMOS33 [get_ports o] -- cgit v1.2.3 From c1e668f8238141a7d19525e9eb7a23c17cd1b120 Mon Sep 17 00:00:00 2001 From: Alessandro Comodi Date: Tue, 16 Mar 2021 21:49:06 +0100 Subject: fpga_interchange: address review comments Signed-off-by: Alessandro Comodi --- fpga_interchange/examples/tests/wire/CMakeLists.txt | 2 ++ 1 file changed, 2 insertions(+) (limited to 'fpga_interchange/examples/tests/wire') diff --git a/fpga_interchange/examples/tests/wire/CMakeLists.txt b/fpga_interchange/examples/tests/wire/CMakeLists.txt index 9af3f0db..59faf402 100644 --- a/fpga_interchange/examples/tests/wire/CMakeLists.txt +++ b/fpga_interchange/examples/tests/wire/CMakeLists.txt @@ -1,5 +1,6 @@ add_interchange_test( name wire_basys3 + family ${family} device xc7a35t package cpg236 tcl run.tcl @@ -9,6 +10,7 @@ add_interchange_test( add_interchange_test( name wire_arty + family ${family} device xc7a35t package csg324 tcl run.tcl -- cgit v1.2.3