From 336d31cbcf592455abdbefc01ec5c6f87914b4f3 Mon Sep 17 00:00:00 2001 From: Alessandro Comodi Date: Wed, 17 Mar 2021 18:43:29 +0100 Subject: fpga_interchange: add more devices Signed-off-by: Alessandro Comodi --- .../examples/tests/wire/CMakeLists.txt | 32 +++++++++++++++++++++- fpga_interchange/examples/tests/wire/wire_arty.xdc | 4 +-- .../examples/tests/wire/wire_nexys_video.xdc | 5 ++++ fpga_interchange/examples/tests/wire/wire_zybo.xdc | 5 ++++ 4 files changed, 43 insertions(+), 3 deletions(-) create mode 100644 fpga_interchange/examples/tests/wire/wire_nexys_video.xdc create mode 100644 fpga_interchange/examples/tests/wire/wire_zybo.xdc (limited to 'fpga_interchange/examples/tests/wire') diff --git a/fpga_interchange/examples/tests/wire/CMakeLists.txt b/fpga_interchange/examples/tests/wire/CMakeLists.txt index 59faf402..c7199475 100644 --- a/fpga_interchange/examples/tests/wire/CMakeLists.txt +++ b/fpga_interchange/examples/tests/wire/CMakeLists.txt @@ -9,7 +9,7 @@ add_interchange_test( ) add_interchange_test( - name wire_arty + name wire_arty_35t family ${family} device xc7a35t package csg324 @@ -17,3 +17,33 @@ add_interchange_test( xdc wire_arty.xdc sources wire.v ) + +add_interchange_test( + name wire_arty_100t + family ${family} + device xc7a100t + package csg324 + tcl run.tcl + xdc wire_arty.xdc + sources wire.v +) + +add_interchange_test( + name wire_nexys_video + family ${family} + device xc7a200t + package sbg484 + tcl run.tcl + xdc wire_nexys_video.xdc + sources wire.v +) + +add_interchange_test( + name wire_zybo + family ${family} + device xc7z010 + package clg400 + tcl run.tcl + xdc wire_zybo.xdc + sources wire.v +) diff --git a/fpga_interchange/examples/tests/wire/wire_arty.xdc b/fpga_interchange/examples/tests/wire/wire_arty.xdc index c923f0fc..54c661c9 100644 --- a/fpga_interchange/examples/tests/wire/wire_arty.xdc +++ b/fpga_interchange/examples/tests/wire/wire_arty.xdc @@ -1,5 +1,5 @@ -set_property PACKAGE_PIN N16 [get_ports i] -set_property PACKAGE_PIN N15 [get_ports o] +set_property PACKAGE_PIN A8 [get_ports i] +set_property PACKAGE_PIN H5 [get_ports o] set_property IOSTANDARD LVCMOS33 [get_ports i] set_property IOSTANDARD LVCMOS33 [get_ports o] diff --git a/fpga_interchange/examples/tests/wire/wire_nexys_video.xdc b/fpga_interchange/examples/tests/wire/wire_nexys_video.xdc new file mode 100644 index 00000000..326f77cb --- /dev/null +++ b/fpga_interchange/examples/tests/wire/wire_nexys_video.xdc @@ -0,0 +1,5 @@ +set_property PACKAGE_PIN E22 [get_ports i] +set_property PACKAGE_PIN T14 [get_ports o] + +set_property IOSTANDARD LVCMOS33 [get_ports i] +set_property IOSTANDARD LVCMOS33 [get_ports o] diff --git a/fpga_interchange/examples/tests/wire/wire_zybo.xdc b/fpga_interchange/examples/tests/wire/wire_zybo.xdc new file mode 100644 index 00000000..072c19d2 --- /dev/null +++ b/fpga_interchange/examples/tests/wire/wire_zybo.xdc @@ -0,0 +1,5 @@ +set_property PACKAGE_PIN G15 [get_ports i] +set_property PACKAGE_PIN M14 [get_ports o] + +set_property IOSTANDARD LVCMOS33 [get_ports i] +set_property IOSTANDARD LVCMOS33 [get_ports o] -- cgit v1.2.3 From 15e945aa1c83d5408f93e6375b38ec81deb4f874 Mon Sep 17 00:00:00 2001 From: Alessandro Comodi Date: Tue, 23 Mar 2021 20:35:53 +0100 Subject: interchange: added boards and group testing across multiple boards Signed-off-by: Alessandro Comodi --- .../examples/tests/wire/CMakeLists.txt | 48 ++-------------------- fpga_interchange/examples/tests/wire/arty100t.xdc | 5 +++ fpga_interchange/examples/tests/wire/arty35t.xdc | 5 +++ fpga_interchange/examples/tests/wire/basys3.xdc | 5 +++ .../examples/tests/wire/nexys_video.xdc | 5 +++ fpga_interchange/examples/tests/wire/wire_arty.xdc | 5 --- .../examples/tests/wire/wire_basys3.xdc | 5 --- .../examples/tests/wire/wire_nexys_video.xdc | 5 --- fpga_interchange/examples/tests/wire/wire_zybo.xdc | 5 --- fpga_interchange/examples/tests/wire/zybo.xdc | 5 +++ 10 files changed, 28 insertions(+), 65 deletions(-) create mode 100644 fpga_interchange/examples/tests/wire/arty100t.xdc create mode 100644 fpga_interchange/examples/tests/wire/arty35t.xdc create mode 100644 fpga_interchange/examples/tests/wire/basys3.xdc create mode 100644 fpga_interchange/examples/tests/wire/nexys_video.xdc delete mode 100644 fpga_interchange/examples/tests/wire/wire_arty.xdc delete mode 100644 fpga_interchange/examples/tests/wire/wire_basys3.xdc delete mode 100644 fpga_interchange/examples/tests/wire/wire_nexys_video.xdc delete mode 100644 fpga_interchange/examples/tests/wire/wire_zybo.xdc create mode 100644 fpga_interchange/examples/tests/wire/zybo.xdc (limited to 'fpga_interchange/examples/tests/wire') diff --git a/fpga_interchange/examples/tests/wire/CMakeLists.txt b/fpga_interchange/examples/tests/wire/CMakeLists.txt index c7199475..7b6567ae 100644 --- a/fpga_interchange/examples/tests/wire/CMakeLists.txt +++ b/fpga_interchange/examples/tests/wire/CMakeLists.txt @@ -1,49 +1,7 @@ -add_interchange_test( - name wire_basys3 +add_interchange_group_test( + name wire family ${family} - device xc7a35t - package cpg236 + board_list basys3 arty35t zybo arty100t nexys_video tcl run.tcl - xdc wire_basys3.xdc - sources wire.v -) - -add_interchange_test( - name wire_arty_35t - family ${family} - device xc7a35t - package csg324 - tcl run.tcl - xdc wire_arty.xdc - sources wire.v -) - -add_interchange_test( - name wire_arty_100t - family ${family} - device xc7a100t - package csg324 - tcl run.tcl - xdc wire_arty.xdc - sources wire.v -) - -add_interchange_test( - name wire_nexys_video - family ${family} - device xc7a200t - package sbg484 - tcl run.tcl - xdc wire_nexys_video.xdc - sources wire.v -) - -add_interchange_test( - name wire_zybo - family ${family} - device xc7z010 - package clg400 - tcl run.tcl - xdc wire_zybo.xdc sources wire.v ) diff --git a/fpga_interchange/examples/tests/wire/arty100t.xdc b/fpga_interchange/examples/tests/wire/arty100t.xdc new file mode 100644 index 00000000..54c661c9 --- /dev/null +++ b/fpga_interchange/examples/tests/wire/arty100t.xdc @@ -0,0 +1,5 @@ +set_property PACKAGE_PIN A8 [get_ports i] +set_property PACKAGE_PIN H5 [get_ports o] + +set_property IOSTANDARD LVCMOS33 [get_ports i] +set_property IOSTANDARD LVCMOS33 [get_ports o] diff --git a/fpga_interchange/examples/tests/wire/arty35t.xdc b/fpga_interchange/examples/tests/wire/arty35t.xdc new file mode 100644 index 00000000..54c661c9 --- /dev/null +++ b/fpga_interchange/examples/tests/wire/arty35t.xdc @@ -0,0 +1,5 @@ +set_property PACKAGE_PIN A8 [get_ports i] +set_property PACKAGE_PIN H5 [get_ports o] + +set_property IOSTANDARD LVCMOS33 [get_ports i] +set_property IOSTANDARD LVCMOS33 [get_ports o] diff --git a/fpga_interchange/examples/tests/wire/basys3.xdc b/fpga_interchange/examples/tests/wire/basys3.xdc new file mode 100644 index 00000000..317d5acc --- /dev/null +++ b/fpga_interchange/examples/tests/wire/basys3.xdc @@ -0,0 +1,5 @@ +set_property PACKAGE_PIN V17 [get_ports i] +set_property PACKAGE_PIN U16 [get_ports o] + +set_property IOSTANDARD LVCMOS33 [get_ports i] +set_property IOSTANDARD LVCMOS33 [get_ports o] diff --git a/fpga_interchange/examples/tests/wire/nexys_video.xdc b/fpga_interchange/examples/tests/wire/nexys_video.xdc new file mode 100644 index 00000000..326f77cb --- /dev/null +++ b/fpga_interchange/examples/tests/wire/nexys_video.xdc @@ -0,0 +1,5 @@ +set_property PACKAGE_PIN E22 [get_ports i] +set_property PACKAGE_PIN T14 [get_ports o] + +set_property IOSTANDARD LVCMOS33 [get_ports i] +set_property IOSTANDARD LVCMOS33 [get_ports o] diff --git a/fpga_interchange/examples/tests/wire/wire_arty.xdc b/fpga_interchange/examples/tests/wire/wire_arty.xdc deleted file mode 100644 index 54c661c9..00000000 --- a/fpga_interchange/examples/tests/wire/wire_arty.xdc +++ /dev/null @@ -1,5 +0,0 @@ -set_property PACKAGE_PIN A8 [get_ports i] -set_property PACKAGE_PIN H5 [get_ports o] - -set_property IOSTANDARD LVCMOS33 [get_ports i] -set_property IOSTANDARD LVCMOS33 [get_ports o] diff --git a/fpga_interchange/examples/tests/wire/wire_basys3.xdc b/fpga_interchange/examples/tests/wire/wire_basys3.xdc deleted file mode 100644 index 317d5acc..00000000 --- a/fpga_interchange/examples/tests/wire/wire_basys3.xdc +++ /dev/null @@ -1,5 +0,0 @@ -set_property PACKAGE_PIN V17 [get_ports i] -set_property PACKAGE_PIN U16 [get_ports o] - -set_property IOSTANDARD LVCMOS33 [get_ports i] -set_property IOSTANDARD LVCMOS33 [get_ports o] diff --git a/fpga_interchange/examples/tests/wire/wire_nexys_video.xdc b/fpga_interchange/examples/tests/wire/wire_nexys_video.xdc deleted file mode 100644 index 326f77cb..00000000 --- a/fpga_interchange/examples/tests/wire/wire_nexys_video.xdc +++ /dev/null @@ -1,5 +0,0 @@ -set_property PACKAGE_PIN E22 [get_ports i] -set_property PACKAGE_PIN T14 [get_ports o] - -set_property IOSTANDARD LVCMOS33 [get_ports i] -set_property IOSTANDARD LVCMOS33 [get_ports o] diff --git a/fpga_interchange/examples/tests/wire/wire_zybo.xdc b/fpga_interchange/examples/tests/wire/wire_zybo.xdc deleted file mode 100644 index 072c19d2..00000000 --- a/fpga_interchange/examples/tests/wire/wire_zybo.xdc +++ /dev/null @@ -1,5 +0,0 @@ -set_property PACKAGE_PIN G15 [get_ports i] -set_property PACKAGE_PIN M14 [get_ports o] - -set_property IOSTANDARD LVCMOS33 [get_ports i] -set_property IOSTANDARD LVCMOS33 [get_ports o] diff --git a/fpga_interchange/examples/tests/wire/zybo.xdc b/fpga_interchange/examples/tests/wire/zybo.xdc new file mode 100644 index 00000000..072c19d2 --- /dev/null +++ b/fpga_interchange/examples/tests/wire/zybo.xdc @@ -0,0 +1,5 @@ +set_property PACKAGE_PIN G15 [get_ports i] +set_property PACKAGE_PIN M14 [get_ports o] + +set_property IOSTANDARD LVCMOS33 [get_ports i] +set_property IOSTANDARD LVCMOS33 [get_ports o] -- cgit v1.2.3