From ecfaae7f9ea9bfad4b9af08495ac72cb5f6972ec Mon Sep 17 00:00:00 2001 From: gatecat Date: Thu, 25 Mar 2021 12:51:19 +0000 Subject: interchange: Add Nexus LUT test Signed-off-by: gatecat --- fpga_interchange/examples/tests/CMakeLists.txt | 1 + fpga_interchange/examples/tests/lut_nexus/CMakeLists.txt | 10 ++++++++++ fpga_interchange/examples/tests/lut_nexus/empty.xdc | 0 fpga_interchange/examples/tests/lut_nexus/lut.v | 7 +++++++ fpga_interchange/examples/tests/lut_nexus/run.tcl | 14 ++++++++++++++ 5 files changed, 32 insertions(+) create mode 100644 fpga_interchange/examples/tests/lut_nexus/CMakeLists.txt create mode 100644 fpga_interchange/examples/tests/lut_nexus/empty.xdc create mode 100644 fpga_interchange/examples/tests/lut_nexus/lut.v create mode 100644 fpga_interchange/examples/tests/lut_nexus/run.tcl (limited to 'fpga_interchange/examples/tests') diff --git a/fpga_interchange/examples/tests/CMakeLists.txt b/fpga_interchange/examples/tests/CMakeLists.txt index 40ec8a75..f58adc70 100644 --- a/fpga_interchange/examples/tests/CMakeLists.txt +++ b/fpga_interchange/examples/tests/CMakeLists.txt @@ -4,3 +4,4 @@ add_subdirectory(counter) add_subdirectory(ram) add_subdirectory(ff) add_subdirectory(lut) +add_subdirectory(lut_nexus) diff --git a/fpga_interchange/examples/tests/lut_nexus/CMakeLists.txt b/fpga_interchange/examples/tests/lut_nexus/CMakeLists.txt new file mode 100644 index 00000000..1c65d87e --- /dev/null +++ b/fpga_interchange/examples/tests/lut_nexus/CMakeLists.txt @@ -0,0 +1,10 @@ +add_interchange_test( + name lut_nexus + family ${family} + device LIFCL-17 + package QFN72 + tcl run.tcl + xdc empty.xdc + sources lut.v + skip_dcp +) diff --git a/fpga_interchange/examples/tests/lut_nexus/empty.xdc b/fpga_interchange/examples/tests/lut_nexus/empty.xdc new file mode 100644 index 00000000..e69de29b diff --git a/fpga_interchange/examples/tests/lut_nexus/lut.v b/fpga_interchange/examples/tests/lut_nexus/lut.v new file mode 100644 index 00000000..5913aff1 --- /dev/null +++ b/fpga_interchange/examples/tests/lut_nexus/lut.v @@ -0,0 +1,7 @@ +module top; + wire x, y; + (*keep*) + LUT4 lut_0(.A(x), .B(x), .C(x), .D(x), .Z(y)); + (*keep*) + LUT4 lut_1(.A(y), .B(y), .C(y), .D(y), .Z(x)); +endmodule \ No newline at end of file diff --git a/fpga_interchange/examples/tests/lut_nexus/run.tcl b/fpga_interchange/examples/tests/lut_nexus/run.tcl new file mode 100644 index 00000000..4aa56c13 --- /dev/null +++ b/fpga_interchange/examples/tests/lut_nexus/run.tcl @@ -0,0 +1,14 @@ +yosys -import + +read_verilog $::env(SOURCES) + +synth_nexus -noccu2 -nobram -nolutram -nowidelut + +# opt_expr -undriven makes sure all nets are driven, if only by the $undef +# net. +opt_expr -undriven +opt_clean + +setundef -zero -params + +write_json $::env(OUT_JSON) -- cgit v1.2.3