From d52516756cf32ecb53b75e8a6f032ebeeb427a71 Mon Sep 17 00:00:00 2001 From: Maciej Kurc Date: Fri, 9 Jul 2021 15:40:06 +0200 Subject: Working site LUT mapping cache Signed-off-by: Maciej Kurc --- fpga_interchange/luts.h | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) (limited to 'fpga_interchange/luts.h') diff --git a/fpga_interchange/luts.h b/fpga_interchange/luts.h index cbb817c9..7b6ce758 100644 --- a/fpga_interchange/luts.h +++ b/fpga_interchange/luts.h @@ -31,6 +31,8 @@ NEXTPNR_NAMESPACE_BEGIN struct CellInfo; struct Context; +struct SiteLutMappingResult; + enum LogicLevel { LL_Zero, @@ -66,6 +68,14 @@ struct LutBel int32_t max_pin; }; +struct SiteLutMapping +{ + struct LutCellMapping { + LutCell lut_cell; + }; +}; + + // Work forward from cell definition and cell -> bel pin map and check that // equation is valid. void check_equation(const LutCell &lut_cell, const dict &cell_to_bel_map, const LutBel &lut_bel, @@ -89,7 +99,7 @@ struct LutMapper std::vector cells; - bool remap_luts(const Context *ctx, pool *blocked_luts); + bool remap_luts(const Context *ctx, SiteLutMappingResult* lut_mapping, pool *blocked_luts); // Determine which wires given the current mapping must be tied to the // default constant. -- cgit v1.2.3 From 8fc16a57c9dee5e7e0f83752a62612f70f18a38e Mon Sep 17 00:00:00 2001 From: Maciej Kurc Date: Fri, 16 Jul 2021 16:01:21 +0200 Subject: Added more code comments, formatted the code Signed-off-by: Maciej Kurc --- fpga_interchange/luts.h | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'fpga_interchange/luts.h') diff --git a/fpga_interchange/luts.h b/fpga_interchange/luts.h index 7b6ce758..8f33507a 100644 --- a/fpga_interchange/luts.h +++ b/fpga_interchange/luts.h @@ -70,12 +70,12 @@ struct LutBel struct SiteLutMapping { - struct LutCellMapping { + struct LutCellMapping + { LutCell lut_cell; }; }; - // Work forward from cell definition and cell -> bel pin map and check that // equation is valid. void check_equation(const LutCell &lut_cell, const dict &cell_to_bel_map, const LutBel &lut_bel, @@ -99,7 +99,8 @@ struct LutMapper std::vector cells; - bool remap_luts(const Context *ctx, SiteLutMappingResult* lut_mapping, pool *blocked_luts); + bool remap_luts(const Context *ctx, SiteLutMappingResult *lut_mapping, + pool *blocked_luts); // Determine which wires given the current mapping must be tied to the // default constant. -- cgit v1.2.3