From 8c468acff8900f40e909882cfbf9381a59199b79 Mon Sep 17 00:00:00 2001
From: Alessandro Comodi <acomodi@antmicro.com>
Date: Wed, 12 May 2021 18:25:47 +0200
Subject: interchange: site router: add valid pips list to check during routing

Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
---
 fpga_interchange/site_router.h | 1 +
 1 file changed, 1 insertion(+)

(limited to 'fpga_interchange/site_router.h')

diff --git a/fpga_interchange/site_router.h b/fpga_interchange/site_router.h
index cf17026d..3222669a 100644
--- a/fpga_interchange/site_router.h
+++ b/fpga_interchange/site_router.h
@@ -38,6 +38,7 @@ struct SiteRouter
     SiteRouter(int16_t site) : site(site), dirty(false), site_ok(true) {}
 
     std::unordered_set<CellInfo *> cells_in_site;
+    std::vector<PipId> valid_pips;
     const int16_t site;
 
     mutable bool dirty;
-- 
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