From f0cd51e6bc58f3dfd1185fd53ad970ba634359f2 Mon Sep 17 00:00:00 2001 From: David Shah Date: Thu, 4 Apr 2019 16:30:47 +0100 Subject: generic: Cell timing support Signed-off-by: David Shah --- generic/arch_pybindings.cc | 20 ++++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-) (limited to 'generic/arch_pybindings.cc') diff --git a/generic/arch_pybindings.cc b/generic/arch_pybindings.cc index 5eb2f2c8..8526e409 100644 --- a/generic/arch_pybindings.cc +++ b/generic/arch_pybindings.cc @@ -42,8 +42,8 @@ void arch_wrap_python() auto arch_cls = class_, boost::noncopyable>("Arch", init()); auto dxy_cls = class_>("DecalXY_", no_init); - readwrite_wrapper, - conv_from_str>::def_wrap(dxy_cls, "decal"); + readwrite_wrapper, + conv_from_str>::def_wrap(dxy_cls, "decal"); readwrite_wrapper, pass_through>::def_wrap( dxy_cls, "x"); readwrite_wrapper, pass_through>::def_wrap( @@ -213,6 +213,22 @@ void arch_wrap_python() fn_wrapper_2a_v, pass_through>::def_wrap(ctx_cls, "setDelayScaling", (arg("scale"), "offset")); + fn_wrapper_2a_v, conv_from_str>::def_wrap(ctx_cls, "addCellTimingClock", + (arg("cell"), "port")); + fn_wrapper_4a_v, conv_from_str, conv_from_str, + pass_through>::def_wrap(ctx_cls, "addCellTimingDelay", + (arg("cell"), "fromPort", "toPort", "delay")); + fn_wrapper_5a_v, conv_from_str, conv_from_str, pass_through, + pass_through>::def_wrap(ctx_cls, "addCellTimingSetupHold", + (arg("cell"), "port", "clock", "setup", "hold")); + fn_wrapper_4a_v, conv_from_str, conv_from_str, + pass_through>::def_wrap(ctx_cls, "addCellTimingClockToOut", + (arg("cell"), "port", "clock", "clktoq")); + WRAP_MAP_UPTR(CellMap, "IdCellMap"); WRAP_MAP_UPTR(NetMap, "IdNetMap"); WRAP_VECTOR(const std::vector, conv_to_str); -- cgit v1.2.3