From ad18cdb08787c4ecc88edaec353a96f59135c62d Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Mon, 18 Jun 2018 13:35:25 +0200 Subject: Rename Chip to Arch and ChipArgs to ArchArgs Signed-off-by: Clifford Wolf --- ice40/arch_place.cc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'ice40/arch_place.cc') diff --git a/ice40/arch_place.cc b/ice40/arch_place.cc index 3205fb6e..d9210378 100644 --- a/ice40/arch_place.cc +++ b/ice40/arch_place.cc @@ -90,7 +90,7 @@ static bool logicCellsCompatible(const std::vector &cells) bool isBelLocationValid(Design *design, BelId bel) { - const Chip &chip = design->chip; + const Arch &chip = design->chip; if (chip.getBelType(bel) == TYPE_ICESTORM_LC) { std::vector cells; for (auto bel_other : chip.getBelsAtSameTile(bel)) { @@ -112,7 +112,7 @@ bool isBelLocationValid(Design *design, BelId bel) bool isValidBelForCell(Design *design, CellInfo *cell, BelId bel) { - const Chip &chip = design->chip; + const Arch &chip = design->chip; if (cell->type == "ICESTORM_LC") { assert(chip.getBelType(bel) == TYPE_ICESTORM_LC); -- cgit v1.2.3