From 9483a95a4adfe9f9715a0066770e12f8b581185e Mon Sep 17 00:00:00 2001 From: Sylvain Munaut Date: Sun, 18 Nov 2018 19:19:07 +0100 Subject: ice40: Improve the is_sb_pll40_XXX predicates collection - Add a test for dual output PLL variant - Make them handle the packet version of the cell This will become useful for various tests during PLL rework Signed-off-by: Sylvain Munaut --- ice40/cells.h | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) (limited to 'ice40/cells.h') diff --git a/ice40/cells.h b/ice40/cells.h index 054388ac..7f349020 100644 --- a/ice40/cells.h +++ b/ice40/cells.h @@ -81,7 +81,19 @@ inline bool is_sb_pll40(const BaseCtx *ctx, const CellInfo *cell) inline bool is_sb_pll40_pad(const BaseCtx *ctx, const CellInfo *cell) { return cell->type == ctx->id("SB_PLL40_PAD") || cell->type == ctx->id("SB_PLL40_2_PAD") || - cell->type == ctx->id("SB_PLL40_2F_PAD"); + cell->type == ctx->id("SB_PLL40_2F_PAD") || + (cell->type == ctx->id("ICESTORM_PLL") && + (cell->attrs.at(ctx->id("TYPE")) == "SB_PLL40_PAD" || cell->attrs.at(ctx->id("TYPE")) == "SB_PLL40_2_PAD" || + cell->attrs.at(ctx->id("TYPE")) == "SB_PLL40_2F_PAD")); +} + +inline bool is_sb_pll40_dual(const BaseCtx *ctx, const CellInfo *cell) +{ + return cell->type == ctx->id("SB_PLL40_2_PAD") || cell->type == ctx->id("SB_PLL40_2F_PAD") || + cell->type == ctx->id("SB_PLL40_2F_CORE") || + (cell->type == ctx->id("ICESTORM_PLL") && (cell->attrs.at(ctx->id("TYPE")) == "SB_PLL40_2_PAD" || + cell->attrs.at(ctx->id("TYPE")) == "SB_PLL40_2F_PAD" || + cell->attrs.at(ctx->id("TYPE")) == "SB_PLL40_2F_CORE")); } uint8_t sb_pll40_type(const BaseCtx *ctx, const CellInfo *cell); -- cgit v1.2.3