From 91a0eb93672e9c764f03fd1b0a7d22595a61c516 Mon Sep 17 00:00:00 2001 From: Olivier Galibert Date: Tue, 18 Jan 2022 22:37:35 +0100 Subject: Mistral: fix gpio OE, add hmc bypass support --- mistral/io.cc | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) (limited to 'mistral/io.cc') diff --git a/mistral/io.cc b/mistral/io.cc index dab3672e..a0a01af3 100644 --- a/mistral/io.cc +++ b/mistral/io.cc @@ -30,10 +30,12 @@ void Arch::create_gpio(int x, int y) WireId pad = add_wire(x, y, id(stringf("PAD[%d]", z))); BelId bel = add_bel(x, y, id(stringf("IO[%d]", z)), id_MISTRAL_IO); add_bel_pin(bel, id_PAD, PORT_INOUT, pad); - // FIXME: is the port index of zero always correct? - add_bel_pin(bel, id_I, PORT_IN, get_port(CycloneV::GPIO, x, y, z, CycloneV::DATAOUT, 0)); - add_bel_pin(bel, id_OE, PORT_IN, get_port(CycloneV::GPIO, x, y, z, CycloneV::OEIN, 0)); - add_bel_pin(bel, id_O, PORT_OUT, get_port(CycloneV::GPIO, x, y, z, CycloneV::DATAIN, 0)); + if(has_port(CycloneV::GPIO, x, y, z, CycloneV::DATAOUT, 0)) { + // FIXME: is the port index of zero always correct? + add_bel_pin(bel, id_I, PORT_IN, get_port(CycloneV::GPIO, x, y, z, CycloneV::DATAOUT, 0)); + add_bel_pin(bel, id_OE, PORT_IN, get_port(CycloneV::GPIO, x, y, z, CycloneV::OEIN, 0)); + add_bel_pin(bel, id_O, PORT_OUT, get_port(CycloneV::GPIO, x, y, z, CycloneV::DATAIN, 0)); + } bel_data(bel).block_index = z; } } -- cgit v1.2.3