pip_test:
    - src_wire: CLBLM_R_X11Y93/CLBLM_L_D3
      dst_wire: SLICE_X15Y93.SLICEL/D3
pip_chain_test:
    - wires:
        - $CONSTANTS_X0Y0.$CONSTANTS/$GND_SOURCE
        - $CONSTANTS_X0Y0/$GND_NODE
        - TIEOFF_X3Y145.TIEOFF/$GND_SITE_WIRE
        - TIEOFF_X3Y145.TIEOFF/HARD0GND_HARD0
        - INT_R_X3Y145/GND_WIRE
    - wires:
        - $CONSTANTS_X0Y0.$CONSTANTS/$VCC_SOURCE
        - $CONSTANTS_X0Y0/$VCC_NODE
        - TIEOFF_X3Y145.TIEOFF/$VCC_SITE_WIRE
        - TIEOFF_X3Y145.TIEOFF/HARD1VCC_HARD1
        - INT_R_X3Y145/VCC_WIRE
    - wires:
        - $CONSTANTS_X0Y0.$CONSTANTS/$VCC_SOURCE
        - $CONSTANTS_X0Y0/$VCC_NODE
        - SLICE_X3Y145.SLICEL/$VCC_SITE_WIRE
        - SLICE_X3Y145.SLICEL/CEUSEDVCC_HARD1
    - wires:
        - $CONSTANTS_X0Y0.$CONSTANTS/$GND_SOURCE
        - $CONSTANTS_X0Y0/$GND_NODE
        - SLICE_X3Y145.SLICEL/$GND_SITE_WIRE
        - SLICE_X3Y145.SLICEL/SRUSEDGND_HARD0
bel_pin_test:
    - bel: SLICE_X15Y93.SLICEL/D6LUT
      pin: A3
      wire: SLICE_X15Y93.SLICEL/D3
    - bel: $CONSTANTS_X0Y0.$CONSTANTS/GND
      pin: G
      wire: $CONSTANTS_X0Y0.$CONSTANTS/$GND_SOURCE
    - bel: $CONSTANTS_X0Y0.$CONSTANTS/VCC
      pin: P
      wire: $CONSTANTS_X0Y0.$CONSTANTS/$VCC_SOURCE
    - bel: SLICE_X1Y19.SLICEL/SRUSEDGND
      pin: "0"
      wire: SLICE_X1Y19.SLICEL/SRUSEDGND_HARD0
      type: PORT_OUT