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| author | Clifford Wolf <clifford@clifford.at> | 2013-03-31 11:19:11 +0200 |
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| committer | Clifford Wolf <clifford@clifford.at> | 2013-03-31 11:19:11 +0200 |
| commit | 161565be104fd0c7b7c4224bd23e9502625e041a (patch) | |
| tree | f0c54a731d73dc7b334579acb56950497a9e1cb6 /.gitignore | |
| parent | 5640b7d6078a681e33e85f06920394204f41c875 (diff) | |
| download | yosys-161565be104fd0c7b7c4224bd23e9502625e041a.tar.gz yosys-161565be104fd0c7b7c4224bd23e9502625e041a.tar.bz2 yosys-161565be104fd0c7b7c4224bd23e9502625e041a.zip | |
Added AST_INITIAL (before verilog "initial" was mapped to AST_ALWAYS)
Diffstat (limited to '.gitignore')
0 files changed, 0 insertions, 0 deletions