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| author | Clifford Wolf <clifford@clifford.at> | 2015-09-16 09:39:31 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2015-09-16 09:39:31 +0200 |
| commit | d9cecabb877b1d58efc1bfcd962201eace67640d (patch) | |
| tree | 27224a44cbaa56da456ee39d8a95c8d95d966175 /techlibs/greenpak4 | |
| parent | c5352f45c3604b60e0bec7a9219d2c139d276573 (diff) | |
| download | yosys-d9cecabb877b1d58efc1bfcd962201eace67640d.tar.gz yosys-d9cecabb877b1d58efc1bfcd962201eace67640d.tar.bz2 yosys-d9cecabb877b1d58efc1bfcd962201eace67640d.zip | |
Fixed copy&paste typo in synth_greenpak4
Diffstat (limited to 'techlibs/greenpak4')
| -rw-r--r-- | techlibs/greenpak4/synth_greenpak4.cc | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/techlibs/greenpak4/synth_greenpak4.cc b/techlibs/greenpak4/synth_greenpak4.cc index ce1b7604a..4de08eb82 100644 --- a/techlibs/greenpak4/synth_greenpak4.cc +++ b/techlibs/greenpak4/synth_greenpak4.cc @@ -34,8 +34,8 @@ bool check_label(bool &active, std::string run_from, std::string run_to, std::st return active; } -struct SynthIce40Pass : public Pass { - SynthIce40Pass() : Pass("synth_greenpak4", "synthesis for GreenPAK4 FPGAs") { } +struct SynthGreenPAK4Pass : public Pass { + SynthGreenPAK4Pass() : Pass("synth_greenpak4", "synthesis for GreenPAK4 FPGAs") { } virtual void help() { // |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---| @@ -224,6 +224,6 @@ struct SynthIce40Pass : public Pass { log_pop(); } -} SynthIce40Pass; +} SynthGreenPAK4Pass; PRIVATE_NAMESPACE_END |