diff options
| -rw-r--r-- | tests/ecp5/fsm.ys | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/tests/ecp5/fsm.ys b/tests/ecp5/fsm.ys index 36b10c0ce..6368edc57 100644 --- a/tests/ecp5/fsm.ys +++ b/tests/ecp5/fsm.ys @@ -2,9 +2,7 @@ read_verilog fsm.v hierarchy -top top proc flatten -#ERROR: Found 4 unproven $equiv cells in 'equiv_status -assert'. -#equiv_opt -assert -map +/ecp5/cells_sim.v synth_ecp5 # equivalency check -equiv_opt -map +/ecp5/cells_sim.v synth_ecp5 # equivalency check +equiv_opt -assert -map +/ecp5/cells_sim.v synth_ecp5 # equivalency check design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design) cd top # Constrain all select calls below inside the top module select -assert-count 1 t:L6MUX21 |