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-rw-r--r--passes/pmgen/xilinx_srl.cc1
1 files changed, 1 insertions, 0 deletions
diff --git a/passes/pmgen/xilinx_srl.cc b/passes/pmgen/xilinx_srl.cc
index 36833839b..d1dbd77ae 100644
--- a/passes/pmgen/xilinx_srl.cc
+++ b/passes/pmgen/xilinx_srl.cc
@@ -204,6 +204,7 @@ struct XilinxSrlPass : public Pass {
for (auto module : design->selected_modules()) {
auto pm = xilinx_srl_pm(module, module->selected_cells());
pm.ud_fixed.minlen = minlen;
+ pm.ud_variable.minlen = minlen;
if (fixed) {
// TODO: How to get these automatically?