diff options
| -rw-r--r-- | passes/opt/opt_dff.cc | 4 | ||||
| -rw-r--r-- | tests/opt/opt_dff_sr.ys | 21 |
2 files changed, 15 insertions, 10 deletions
diff --git a/passes/opt/opt_dff.cc b/passes/opt/opt_dff.cc index a47071a30..c87ac3163 100644 --- a/passes/opt/opt_dff.cc +++ b/passes/opt/opt_dff.cc @@ -318,9 +318,9 @@ struct OptDffWorker if (!ff.pol_clr) { module->connect(ff.sig_q[i], ff.sig_clr[i]); } else if (ff.is_fine) { - module->addNotGate(NEW_ID, ff.sig_q[i], ff.sig_clr[i]); + module->addNotGate(NEW_ID, ff.sig_clr[i], ff.sig_q[i]); } else { - module->addNot(NEW_ID, ff.sig_q[i], ff.sig_clr[i]); + module->addNot(NEW_ID, ff.sig_clr[i], ff.sig_q[i]); } log("Handling always-active SET at position %d on %s (%s) from module %s (changing to combinatorial circuit).\n", i, log_id(cell), log_id(cell->type), log_id(module)); diff --git a/tests/opt/opt_dff_sr.ys b/tests/opt/opt_dff_sr.ys index daedb115c..0961cb11e 100644 --- a/tests/opt/opt_dff_sr.ys +++ b/tests/opt/opt_dff_sr.ys @@ -22,8 +22,10 @@ EOT design -save orig -equiv_opt -undef -assert -multiclock opt_dff -design -load postopt +# Equivalence check will fail for unmapped adlatch and dlatchsr due to negative hold hack. +#equiv_opt -undef -assert -multiclock opt_dff +#design -load postopt +opt_dff select -assert-count 1 t:$dffsr select -assert-count 1 t:$dffsr r:WIDTH=2 %i select -assert-count 1 t:$dffsre @@ -34,8 +36,9 @@ select -assert-none t:$sr design -load orig -equiv_opt -undef -assert -multiclock opt_dff -keepdc -design -load postopt +#equiv_opt -undef -assert -multiclock opt_dff -keepdc +#design -load postopt +opt_dff -keepdc select -assert-count 1 t:$dffsr select -assert-count 1 t:$dffsr r:WIDTH=4 %i select -assert-count 1 t:$dffsre @@ -48,8 +51,9 @@ select -assert-count 1 t:$sr r:WIDTH=4 %i design -load orig simplemap -equiv_opt -undef -assert -multiclock opt_dff -design -load postopt +#equiv_opt -undef -assert -multiclock opt_dff +#design -load postopt +opt_dff select -assert-count 1 t:$_DFF_PP0_ select -assert-count 1 t:$_DFF_PP1_ select -assert-count 1 t:$_DFFE_PN0P_ @@ -61,8 +65,9 @@ select -assert-none t:$_DFF_PP0_ t:$_DFF_PP1_ t:$_DFFE_PN0P_ t:$_DFFE_PN1P_ t:$_ design -load orig simplemap -equiv_opt -undef -assert -multiclock opt_dff -keepdc -design -load postopt +#equiv_opt -undef -assert -multiclock opt_dff -keepdc +#design -load postopt +opt_dff -keepdc select -assert-count 1 t:$_DFF_PP0_ select -assert-count 1 t:$_DFF_PP1_ select -assert-count 2 t:$_DFFSR_PPP_ |