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-rw-r--r--Makefile2
-rw-r--r--backends/cxxrtl/cxxrtl_backend.cc41
-rw-r--r--frontends/verific/verific.cc2
-rw-r--r--passes/techmap/abc.cc7
-rw-r--r--tests/arch/nexus/run-test.sh22
5 files changed, 43 insertions, 31 deletions
diff --git a/Makefile b/Makefile
index 0fb3ef150..ffee2e2b9 100644
--- a/Makefile
+++ b/Makefile
@@ -123,7 +123,7 @@ LDFLAGS += -rdynamic
LDLIBS += -lrt
endif
-YOSYS_VER := 0.9+3654
+YOSYS_VER := 0.9+3667
GIT_REV := $(shell cd $(YOSYS_SRC) && git rev-parse --short HEAD 2> /dev/null || echo UNKNOWN)
OBJS = kernel/version_$(GIT_REV).o
diff --git a/backends/cxxrtl/cxxrtl_backend.cc b/backends/cxxrtl/cxxrtl_backend.cc
index dfea04409..a48ea5b23 100644
--- a/backends/cxxrtl/cxxrtl_backend.cc
+++ b/backends/cxxrtl/cxxrtl_backend.cc
@@ -22,6 +22,7 @@
#include "kernel/sigtools.h"
#include "kernel/utils.h"
#include "kernel/celltypes.h"
+#include "kernel/mem.h"
#include "kernel/log.h"
USING_YOSYS_NAMESPACE
@@ -526,6 +527,7 @@ struct CxxrtlWorker {
std::ostream *impl_f = nullptr;
std::ostream *intf_f = nullptr;
+ bool run_hierarchy = false;
bool run_flatten = false;
bool run_proc = false;
@@ -2182,6 +2184,8 @@ struct CxxrtlWorker {
if (wire->name.begins_with("$") && !elide_internal) continue;
if (wire->name.begins_with("\\") && !elide_public) continue;
if (edge_wires[wire]) continue;
+ if (flow.wire_comb_defs[wire].size() > 1)
+ log_cmd_error("Wire %s.%s has multiple drivers.\n", log_id(module), log_id(wire));
log_assert(flow.wire_comb_defs[wire].size() == 1);
elided_wires[wire] = **flow.wire_comb_defs[wire].begin();
}
@@ -2326,9 +2330,9 @@ struct CxxrtlWorker {
}
}
- void check_design(RTLIL::Design *design, bool &has_sync_init, bool &has_packed_mem)
+ void check_design(RTLIL::Design *design, bool &has_top, bool &has_sync_init, bool &has_packed_mem)
{
- has_sync_init = has_packed_mem = false;
+ has_sync_init = has_packed_mem = has_top = false;
for (auto module : design->modules()) {
if (module->get_blackbox_attribute() && !module->has_attribute(ID(cxxrtl_blackbox)))
@@ -2340,13 +2344,17 @@ struct CxxrtlWorker {
if (!design->selected_module(module))
continue;
+ if (module->get_bool_attribute(ID::top))
+ has_top = true;
+
for (auto proc : module->processes)
for (auto sync : proc.second->syncs)
if (sync->type == RTLIL::STi)
has_sync_init = true;
- for (auto cell : module->cells())
- if (cell->type == ID($mem))
+ // The Mem constructor also checks for well-formedness of $meminit cells, if any.
+ for (auto &mem : Mem::get_all_memories(module))
+ if (mem.packed)
has_packed_mem = true;
}
}
@@ -2354,9 +2362,13 @@ struct CxxrtlWorker {
void prepare_design(RTLIL::Design *design)
{
bool did_anything = false;
- bool has_sync_init, has_packed_mem;
+ bool has_top, has_sync_init, has_packed_mem;
log_push();
- check_design(design, has_sync_init, has_packed_mem);
+ check_design(design, has_top, has_sync_init, has_packed_mem);
+ if (run_hierarchy && !has_top) {
+ Pass::call(design, "hierarchy -auto-top");
+ did_anything = true;
+ }
if (run_flatten) {
Pass::call(design, "flatten");
did_anything = true;
@@ -2377,9 +2389,9 @@ struct CxxrtlWorker {
did_anything = true;
}
// Recheck the design if it was modified.
- if (has_sync_init || has_packed_mem)
- check_design(design, has_sync_init, has_packed_mem);
- log_assert(!(has_sync_init || has_packed_mem));
+ if (did_anything)
+ check_design(design, has_top, has_sync_init, has_packed_mem);
+ log_assert(has_top && !has_sync_init && !has_packed_mem);
log_pop();
if (did_anything)
log_spacer();
@@ -2561,6 +2573,11 @@ struct CxxrtlBackend : public Backend {
log(" place the generated code into namespace <ns-name>. if not specified,\n");
log(" \"cxxrtl_design\" is used.\n");
log("\n");
+ log(" -nohierarchy\n");
+ log(" use design hierarchy as-is. in most designs, a top module should be\n");
+ log(" present as it is exposed through the C API and has unbuffered outputs\n");
+ log(" for improved performance; it will be determined automatically if absent.\n");
+ log("\n");
log(" -noflatten\n");
log(" don't flatten the design. fully flattened designs can evaluate within\n");
log(" one delta cycle if they have no combinatorial feedback.\n");
@@ -2617,6 +2634,7 @@ struct CxxrtlBackend : public Backend {
void execute(std::ostream *&f, std::string filename, std::vector<std::string> args, RTLIL::Design *design) override
{
+ bool nohierarchy = false;
bool noflatten = false;
bool noproc = false;
int opt_level = DEFAULT_OPT_LEVEL;
@@ -2628,6 +2646,10 @@ struct CxxrtlBackend : public Backend {
size_t argidx;
for (argidx = 1; argidx < args.size(); argidx++)
{
+ if (args[argidx] == "-nohierarchy") {
+ nohierarchy = true;
+ continue;
+ }
if (args[argidx] == "-noflatten") {
noflatten = true;
continue;
@@ -2673,6 +2695,7 @@ struct CxxrtlBackend : public Backend {
}
extra_args(f, filename, args, argidx);
+ worker.run_hierarchy = !nohierarchy;
worker.run_flatten = !noflatten;
worker.run_proc = !noproc;
switch (opt_level) {
diff --git a/frontends/verific/verific.cc b/frontends/verific/verific.cc
index e236aaaf2..31c77d39c 100644
--- a/frontends/verific/verific.cc
+++ b/frontends/verific/verific.cc
@@ -55,7 +55,7 @@ USING_YOSYS_NAMESPACE
# error "Only Symbiotic EDA flavored Verific is supported. Please contact office@symbioticeda.com for commercial support for Yosys+Verific."
#endif
-#if SYMBIOTIC_VERIFIC_API_VERSION < 20200902
+#if SYMBIOTIC_VERIFIC_API_VERSION < 20201001
# error "Please update your version of Symbiotic EDA flavored Verific."
#endif
diff --git a/passes/techmap/abc.cc b/passes/techmap/abc.cc
index ce50e9a5b..66ac6828f 100644
--- a/passes/techmap/abc.cc
+++ b/passes/techmap/abc.cc
@@ -1471,7 +1471,12 @@ struct AbcPass : public Pass {
po_map.clear();
#ifdef ABCEXTERNAL
- std::string exe_file = ABCEXTERNAL;
+ std::string exe_file;
+ if (std::getenv("ABC")) {
+ exe_file = std::getenv("ABC");
+ } else {
+ exe_file = ABCEXTERNAL;
+ }
#else
std::string exe_file = proc_self_dirname() + proc_program_prefix() + "yosys-abc";
#endif
diff --git a/tests/arch/nexus/run-test.sh b/tests/arch/nexus/run-test.sh
index bf19b887d..4be4b70ae 100644
--- a/tests/arch/nexus/run-test.sh
+++ b/tests/arch/nexus/run-test.sh
@@ -1,20 +1,4 @@
#!/usr/bin/env bash
-set -e
-{
-echo "all::"
-for x in *.ys; do
- echo "all:: run-$x"
- echo "run-$x:"
- echo " @echo 'Running $x..'"
- echo " @../../../yosys -ql ${x%.ys}.log -w 'Yosys has only limited support for tri-state logic at the moment.' $x"
-done
-for s in *.sh; do
- if [ "$s" != "run-test.sh" ]; then
- echo "all:: run-$s"
- echo "run-$s:"
- echo " @echo 'Running $s..'"
- echo " @bash $s"
- fi
-done
-} > run-test.mk
-exec ${MAKE:-make} -f run-test.mk
+set -eu
+source ../../gen-tests-makefile.sh
+run_tests --yosys-scripts --bash --yosys-args "-w 'Yosys has only limited support for tri-state logic at the moment.'"