diff options
| -rw-r--r-- | tests/ice40/memory.ys | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/tests/ice40/memory.ys b/tests/ice40/memory.ys index fa5d004b0..9b7490cd8 100644 --- a/tests/ice40/memory.ys +++ b/tests/ice40/memory.ys @@ -1,5 +1,17 @@ read_verilog memory.v -synth_ice40 +hierarchy -top top +proc +memory -nomap +equiv_opt -run :prove -map +/ice40/cells_sim.v synth_ice40 +memory +opt -full + +# TODO +#equiv_opt -run prove: -assert null +miter -equiv -flatten -make_assert -make_outputs gold gate miter +#sat -verify -prove-asserts -tempinduct -show-inputs -show-outputs miter + +design -load postopt cd top select -assert-count 1 t:SB_RAM40_4K select -assert-none t:SB_RAM40_4K %% t:* %D |