diff options
| -rw-r--r-- | backends/aiger/xaiger.cc | 4 | ||||
| -rw-r--r-- | frontends/ast/simplify.cc | 28 | ||||
| -rw-r--r-- | frontends/verilog/verilog_parser.y | 3 | ||||
| -rw-r--r-- | tests/svtypes/typedef_package.sv | 11 |
4 files changed, 40 insertions, 6 deletions
diff --git a/backends/aiger/xaiger.cc b/backends/aiger/xaiger.cc index 3b51d8685..3c7c745fe 100644 --- a/backends/aiger/xaiger.cc +++ b/backends/aiger/xaiger.cc @@ -280,6 +280,10 @@ struct XAigerWriter if (abc9_flop) continue; } + else { + if (cell->type == ID($__ABC9_DELAY)) + log_error("Cell type '%s' not recognised. Check that '+/abc9_model.v' has been read.\n", cell->type.c_str()); + } bool cell_known = inst_module || cell->known(); for (const auto &c : cell->connections()) { diff --git a/frontends/ast/simplify.cc b/frontends/ast/simplify.cc index b87af0f8c..ced5e5cf9 100644 --- a/frontends/ast/simplify.cc +++ b/frontends/ast/simplify.cc @@ -420,9 +420,10 @@ bool AstNode::simplify(bool const_fold, bool at_zero, bool in_lvalue, int stage, current_scope[node->str] = node; for (auto enode : node->children) { log_assert(enode->type==AST_ENUM_ITEM); - if (current_scope.count(enode->str) == 0) { + if (current_scope.count(enode->str) == 0) current_scope[enode->str] = enode; - } + else + log_file_error(filename, location.first_line, "enum item %s already exists\n", enode->str.c_str()); } } } @@ -441,6 +442,29 @@ bool AstNode::simplify(bool const_fold, bool at_zero, bool in_lvalue, int stage, } } + // create name resolution entries for all objects with names + if (type == AST_PACKAGE) { + //add names to package scope + for (size_t i = 0; i < children.size(); i++) { + AstNode *node = children[i]; + // these nodes appear at the top level in a package and can define names + if (node->type == AST_PARAMETER || node->type == AST_LOCALPARAM || node->type == AST_TYPEDEF) { + current_scope[node->str] = node; + } + if (node->type == AST_ENUM) { + current_scope[node->str] = node; + for (auto enode : node->children) { + log_assert(enode->type==AST_ENUM_ITEM); + if (current_scope.count(enode->str) == 0) + current_scope[enode->str] = enode; + else + log_file_error(filename, location.first_line, "enum item %s already exists in package\n", enode->str.c_str()); + } + } + } + } + + auto backup_current_block = current_block; auto backup_current_block_child = current_block_child; auto backup_current_top_block = current_top_block; diff --git a/frontends/verilog/verilog_parser.y b/frontends/verilog/verilog_parser.y index bd51aa12b..76373c2e4 100644 --- a/frontends/verilog/verilog_parser.y +++ b/frontends/verilog/verilog_parser.y @@ -521,7 +521,8 @@ package_body: package_body_stmt: typedef_decl | - localparam_decl; + localparam_decl | + param_decl; interface: TOK_INTERFACE { diff --git a/tests/svtypes/typedef_package.sv b/tests/svtypes/typedef_package.sv index 57a78c53a..2d83742c5 100644 --- a/tests/svtypes/typedef_package.sv +++ b/tests/svtypes/typedef_package.sv @@ -1,6 +1,9 @@ package pkg; typedef logic [7:0] uint8_t; - typedef enum logic [7:0] {bb=8'hBB} enum8_t; + typedef enum logic [7:0] {bb=8'hBB, cc=8'hCC} enum8_t; + + localparam uint8_t PCONST = cc; + parameter uint8_t PCONST_COPY = PCONST; endpackage module top; @@ -8,7 +11,9 @@ module top; (* keep *) pkg::uint8_t a = 8'hAA; (* keep *) pkg::enum8_t b_enum = pkg::bb; - always @* assert(a == 8'hAA); - always @* assert(b_enum == 8'hBB); + always_comb assert(a == 8'hAA); + always_comb assert(b_enum == 8'hBB); + always_comb assert(pkg::PCONST == pkg::cc); + always_comb assert(pkg::PCONST_COPY == pkg::cc); endmodule |