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-rw-r--r--techlibs/xilinx/abc9_map.v4
1 files changed, 2 insertions, 2 deletions
diff --git a/techlibs/xilinx/abc9_map.v b/techlibs/xilinx/abc9_map.v
index 2cabe57d7..a3f9e311e 100644
--- a/techlibs/xilinx/abc9_map.v
+++ b/techlibs/xilinx/abc9_map.v
@@ -186,7 +186,7 @@ module FDCE (output Q, input C, CE, D, CLR);
// $__ABC9_ASYNC1 below
);
// Since this is an async flop, async behaviour is dealt with here
- $__ABC9_ASYNC0 abc_async (.A($abc9_currQ), .S(CLR ^ IS_CLR_INVERTED), .Y(QQ));
+ $__ABC9_ASYNC1 abc_async (.A($abc9_currQ), .S(CLR ^ IS_CLR_INVERTED), .Y(QQ));
end
else begin
assign Q = QQ;
@@ -204,7 +204,7 @@ module FDCE (output Q, input C, CE, D, CLR);
// $__ABC9_ASYNC0 below
);
// Since this is an async flop, async behaviour is dealt with here
- $__ABC9_ASYNC1 abc_async (.A($abc9_currQ), .S(CLR ^ IS_CLR_INVERTED), .Y(QQ));
+ $__ABC9_ASYNC0 abc_async (.A($abc9_currQ), .S(CLR ^ IS_CLR_INVERTED), .Y(QQ));
end endgenerate
$__ABC9_FF_ abc_dff (.D($Q), .Q($abc9_currQ));