diff options
| -rw-r--r-- | kernel/rtlil.h | 4 | ||||
| -rw-r--r-- | passes/equiv/equiv_make.cc | 4 |
2 files changed, 2 insertions, 6 deletions
diff --git a/kernel/rtlil.h b/kernel/rtlil.h index 3323f13f0..276540aa1 100644 --- a/kernel/rtlil.h +++ b/kernel/rtlil.h @@ -1304,10 +1304,6 @@ inline const RTLIL::SigBit &RTLIL::SigSpecConstIterator::operator*() const { } inline RTLIL::SigBit::SigBit(const RTLIL::SigSpec &sig) { - if(sig.size() != 1 || sig.chunks().size() != 1) { - std::cout << "rtp " << sig.size() << std::endl; - std::cout << "rtp " << sig.chunks().size() << std::endl; - } log_assert(sig.size() == 1 && sig.chunks().size() == 1); *this = SigBit(sig.chunks().front()); } diff --git a/passes/equiv/equiv_make.cc b/passes/equiv/equiv_make.cc index b4905f7c3..cfb4d4438 100644 --- a/passes/equiv/equiv_make.cc +++ b/passes/equiv/equiv_make.cc @@ -290,7 +290,7 @@ struct EquivMakeWorker init_bit2driven(); - pool<Cell*> visited_cells; + pool<Cell*> visited_cells; for (auto c : cells_list) for (auto &conn : c->connections()) if (!ct.cell_output(c->type, conn.first)) { @@ -418,7 +418,7 @@ struct EquivMakeWorker } } - bool check_signal_in_fanout(pool<Cell*> & visited_cells, SigSpec source_bit, SigSpec target_bit) + bool check_signal_in_fanout(pool<Cell*> & visited_cells, SigBit source_bit, SigBit target_bit) { if (source_bit == target_bit) return true; |