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-rw-r--r--passes/pmgen/Makefile.inc2
-rw-r--r--techlibs/common/synth.cc2
2 files changed, 2 insertions, 2 deletions
diff --git a/passes/pmgen/Makefile.inc b/passes/pmgen/Makefile.inc
index 790811d4c..382a1b4ad 100644
--- a/passes/pmgen/Makefile.inc
+++ b/passes/pmgen/Makefile.inc
@@ -17,7 +17,7 @@ $(eval $(call add_extra_objs,passes/pmgen/ice40_dsp_pm.h))
OBJS += passes/pmgen/ice40_wrapcarry.o
passes/pmgen/ice40_wrapcarry.o: passes/pmgen/ice40_wrapcarry_pm.h
-$(eval $(call add_extra_objs,passes/pmgen/test_pmgen_pm.h))
+$(eval $(call add_extra_objs,passes/pmgen/ice40_wrapcarry_pm.h))
# --------------------------------------
diff --git a/techlibs/common/synth.cc b/techlibs/common/synth.cc
index 555de9fba..a176357a7 100644
--- a/techlibs/common/synth.cc
+++ b/techlibs/common/synth.cc
@@ -175,7 +175,7 @@ struct SynthPass : public ScriptPass
log_cmd_error("This command only operates on fully selected designs!\n");
if (abc == "abc9" && !lut)
- log_cmd_error("ABC9 flow only supported for FPGA synthesis (using '-lut' option)");
+ log_cmd_error("ABC9 flow only supported for FPGA synthesis (using '-lut' option)\n");
log_header(design, "Executing SYNTH pass.\n");
log_push();