diff options
| -rw-r--r-- | frontends/ast/simplify.cc | 2 | ||||
| -rw-r--r-- | kernel/log.cc | 4 | ||||
| -rw-r--r-- | kernel/log.h | 1 | ||||
| -rw-r--r-- | kernel/rtlil.cc | 2 |
4 files changed, 8 insertions, 1 deletions
diff --git a/frontends/ast/simplify.cc b/frontends/ast/simplify.cc index 30b4f5139..88df28f8b 100644 --- a/frontends/ast/simplify.cc +++ b/frontends/ast/simplify.cc @@ -678,7 +678,7 @@ bool AstNode::simplify(bool const_fold, bool at_zero, bool in_lvalue, int stage, if (children.size() > 1 && children[1]->type == AST_RANGE) { if (!children[1]->range_valid) log_error("Non-constant width range on parameter decl at %s:%d.\n", filename.c_str(), linenum); - int width = children[1]->range_left - children[1]->range_right + 1; + int width = std::abs(children[1]->range_left - children[1]->range_right) + 1; if (children[0]->type == AST_REALVALUE) { RTLIL::Const constvalue = children[0]->realAsConst(width); log_warning("converting real value %e to binary %s at %s:%d.\n", diff --git a/kernel/log.cc b/kernel/log.cc index 29644a067..dbc94ce8c 100644 --- a/kernel/log.cc +++ b/kernel/log.cc @@ -376,6 +376,10 @@ void log_flush() f->flush(); } +void log_dump_val_worker(RTLIL::IdString v) { + log("%s", log_id(v)); +} + void log_dump_val_worker(RTLIL::SigSpec v) { log("%s", log_signal(v)); } diff --git a/kernel/log.h b/kernel/log.h index 16ad7b6c9..abd204046 100644 --- a/kernel/log.h +++ b/kernel/log.h @@ -222,6 +222,7 @@ static inline void log_dump_val_worker(const char *v) { log("%s", v); } static inline void log_dump_val_worker(std::string v) { log("%s", v.c_str()); } static inline void log_dump_val_worker(PerformanceTimer p) { log("%f seconds", p.sec()); } static inline void log_dump_args_worker(const char *p YS_ATTRIBUTE(unused)) { log_assert(*p == 0); } +void log_dump_val_worker(RTLIL::IdString v); void log_dump_val_worker(RTLIL::SigSpec v); template<typename T> diff --git a/kernel/rtlil.cc b/kernel/rtlil.cc index bf0fd1c89..373a3a5e6 100644 --- a/kernel/rtlil.cc +++ b/kernel/rtlil.cc @@ -1158,6 +1158,8 @@ void RTLIL::Module::cloneInto(RTLIL::Module *new_mod) const log_assert(new_mod->refcount_wires_ == 0); log_assert(new_mod->refcount_cells_ == 0); + new_mod->avail_parameters = avail_parameters; + for (auto &conn : connections_) new_mod->connect(conn); |