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Diffstat (limited to 'CHANGELOG')
-rw-r--r-- | CHANGELOG | 9 |
1 files changed, 9 insertions, 0 deletions
@@ -4,6 +4,15 @@ List of major changes and improvements between releases Yosys 0.15 .. Yosys 0.15-dev -------------------------- + * Various + - Added BTOR2 witness file co-simulation. + - Simulation calls external vcd2fst for VCD conversion. + - Added fst2tb pass - generates testbench for the circuit using + the given top-level module and simulus signal from FST file. + - yosys-smtbmc: Option to keep going after failed assertions in BMC mode + + * Verific support + - Import modules in alphabetic (reproducable) order. Yosys 0.14 .. Yosys 0.15 -------------------------- |