diff options
Diffstat (limited to 'CHANGELOG')
| -rw-r--r-- | CHANGELOG | 9 |
1 files changed, 5 insertions, 4 deletions
@@ -18,16 +18,17 @@ Yosys 0.8 .. Yosys 0.8-dev - Added "equiv_opt" pass - Added "shregmap -tech xilinx" - Added "read_aiger" frontend - - Added "shregmap -tech xilinx" + - Added "muxcover -mux{4,8,16}=<cost>" + - Added "muxcover -dmux=<cost>" + - Added "muxcover -nopartial" + - Added "muxpack" pass - Added "abc9" pass for timing-aware techmapping (experimental, FPGA only, no FFs) - Added "synth_xilinx -abc9" (experimental) - Added "synth_ice40 -abc9" (experimental) - Added "synth -abc9" (experimental) - - Added "muxpack" pass - - Extended "muxcover -mux{4,8,16}=<cost>" - - Fixed sign extension of unsized constants with 'bx and 'bz MSB - "synth_xilinx" to now infer hard shift registers (-nosrl to disable) - "synth_xilinx" to now infer wide multiplexers (-nomux to disable) + - Fixed sign extension of unsized constants with 'bx and 'bz MSB Yosys 0.7 .. Yosys 0.8 |