1 files changed, 120 insertions, 95 deletions

diff --git a/frontends/ast/simplify.cc b/frontends/ast/simplify.cc
index 2d9d6dc79..717645183 100644
--- a/frontends/ast/simplify.cc
+++ b/frontends/ast/simplify.cc
@@ -285,10 +285,9 @@ static void save_struct_array_width(AstNode *node, int width)
 
 }
 
-static int get_struct_array_width(AstNode *node)
+static void save_struct_range_swapped(AstNode *node, bool range_swapped)
 {
-	// the stride for the array, 1 if not an array
-	return (node->multirange_dimensions.empty() ? 1 : node->multirange_dimensions.back());
+	node->multirange_swapped.push_back(range_swapped);
 
 }
 
@@ -318,38 +317,49 @@ static int size_packed_struct(AstNode *snode, int base_offset)
 				// member width e.g. bit [7:0] a
 				width = range_width(node, node->children[0]);
 				if (node->children.size() == 2) {
+					// Unpacked array. Note that this is a Yosys extension; only packed data types
+					// and integer data types are allowed in packed structs / unions in SystemVerilog.
 					if (node->children[1]->type == AST_RANGE) {
-						// unpacked array e.g. bit [63:0] a [0:3]
+						// Unpacked array, e.g. bit [63:0] a [0:3]
 						auto rnode = node->children[1];
-						int array_count = range_width(node, rnode);
-						if (array_count == 1) {
-							// C-type array size e.g. bit [63:0] a [4]
-							array_count = rnode->range_left;
-						}
+						// C-style array size, e.g. bit [63:0] a [4]
+						bool c_type = rnode->children.size() == 1;
+						int array_count = c_type ? rnode->range_left : range_width(node, rnode);
+						save_struct_array_width(node, array_count);
+						save_struct_range_swapped(node, rnode->range_swapped || c_type);
 						save_struct_array_width(node, width);
+						save_struct_range_swapped(node, node->children[0]->range_swapped);
 						width *= array_count;
 					}
 					else {
-						// array element must be single bit for a packed array
+						// The Yosys extension for unpacked arrays in packed structs / unions
+						// only supports memories, i.e. e.g. logic [7:0] a [256] - see above.
 						struct_array_packing_error(node);
 					}
+				} else {
+					// Vector
+					save_struct_array_width(node, width);
+					save_struct_range_swapped(node, node->children[0]->range_swapped);
 				}
 				// range nodes are now redundant
 				for (AstNode *child : node->children)
 					delete child;
 				node->children.clear();
 			}
-			else if (node->children.size() == 1 && node->children[0]->type == AST_MULTIRANGE) {
-				// packed 2D array, e.g. bit [3:0][63:0] a
-				auto rnode = node->children[0];
-				if (rnode->children.size() != 2) {
-					// packed arrays can only be 2D
+			else if (node->children.size() > 0 && node->children[0]->type == AST_MULTIRANGE) {
+				// Packed array, e.g. bit [3:0][63:0] a
+				if (node->children.size() != 1) {
+					// The Yosys extension for unpacked arrays in packed structs / unions
+					// only supports memories, i.e. e.g. logic [7:0] a [256] - see above.
 					struct_array_packing_error(node);
 				}
-				int array_count = range_width(node, rnode->children[0]);
-				width = range_width(node, rnode->children[1]);
-				save_struct_array_width(node, width);
-				width *= array_count;
+				width = 1;
+				for (auto rnode : node->children[0]->children) {
+					int rwidth = range_width(node, rnode);
+					save_struct_array_width(node, rwidth);
+					save_struct_range_swapped(node, rnode->range_swapped);
+					width *= rwidth;
+				}
 				// range nodes are now redundant
 				for (AstNode *child : node->children)
 					delete child;
@@ -408,55 +418,51 @@ static AstNode *multiply_by_const(AstNode *expr_node, int stride)
 	return new AstNode(AST_MUL, expr_node, node_int(stride));
 }
 
-static AstNode *offset_indexed_range(int offset, int stride, AstNode *left_expr, AstNode *right_expr)
+static AstNode *normalize_struct_index(AstNode *expr, AstNode *member_node, int dimension)
 {
-	// adjust the range expressions to add an offset into the struct
-	// and maybe index using an array stride
-	auto left  = left_expr->clone();
-	auto right = right_expr->clone();
-	if (stride > 1) {
-		// newleft = (left + 1) * stride - 1
-		left  = new AstNode(AST_SUB, multiply_by_const(new AstNode(AST_ADD, left, node_int(1)), stride), node_int(1));
-		// newright = right * stride
-		right = multiply_by_const(right, stride);
-	}
-	// add the offset
-	if (offset) {
-		left  = new AstNode(AST_ADD, node_int(offset), left);
-		right = new AstNode(AST_ADD, node_int(offset), right);
+	expr = expr->clone();
+
+	if (member_node->multirange_swapped[dimension]) {
+		// The dimension has swapped range; swap index into the struct accordingly.
+		int msb = member_node->multirange_dimensions[dimension] - 1;
+		expr = new AstNode(AST_SUB, node_int(msb), expr);
 	}
-	return new AstNode(AST_RANGE, left, right);
+
+	return expr;
 }
 
-static AstNode *make_struct_index_range(AstNode *node, AstNode *rnode, int stride, int offset)
+static AstNode *struct_index_lsb_offset(AstNode *lsb_offset, AstNode *rnode, AstNode *member_node, int dimension, int &stride)
 {
-	// generate a range node to perform either bit or array indexing
+	stride /= member_node->multirange_dimensions[dimension];
+	auto right = normalize_struct_index(rnode->children.back(), member_node, dimension);
+	auto offset = stride > 1 ? multiply_by_const(right, stride) : right;
+	return new AstNode(AST_ADD, lsb_offset, offset);
+}
+
+static AstNode *struct_index_msb_offset(AstNode *lsb_offset, AstNode *rnode, AstNode *member_node, int dimension, int stride)
+{
+	log_assert(rnode->children.size() <= 2);
+
+	// Offset to add to LSB
+	AstNode *offset;
 	if (rnode->children.size() == 1) {
-		// index e.g. s.a[i]
-		return offset_indexed_range(offset, stride, rnode->children[0], rnode->children[0]);
-	}
-	else if (rnode->children.size() == 2) {
-		// slice e.g. s.a[i:j]
-		return offset_indexed_range(offset, stride, rnode->children[0], rnode->children[1]);
+		// Index, e.g. s.a[i]
+		offset = node_int(stride - 1);
 	}
 	else {
-		struct_op_error(node);
+		// rnode->children.size() == 2
+		// Slice, e.g. s.a[i:j]
+		auto left = normalize_struct_index(rnode->children[0], member_node, dimension);
+		auto right = normalize_struct_index(rnode->children[1], member_node, dimension);
+		offset = new AstNode(AST_SUB, left, right);
+		if (stride > 1) {
+			// offset = (msb - lsb + 1)*stride - 1
+			auto slice_width = new AstNode(AST_ADD, offset, node_int(1));
+			offset = new AstNode(AST_SUB, multiply_by_const(slice_width, stride), node_int(1));
+		}
 	}
-}
 
-static AstNode *slice_range(AstNode *rnode, AstNode *snode)
-{
-	// apply the bit slice indicated by snode to the range rnode
-	log_assert(rnode->type==AST_RANGE);
-	auto left  = rnode->children[0];
-	auto right = rnode->children[1];
-	log_assert(snode->type==AST_RANGE);
-	auto slice_left  = snode->children[0];
-	auto slice_right = snode->children[1];
-	auto width = new AstNode(AST_SUB, slice_left->clone(), slice_right->clone());
-	right = new AstNode(AST_ADD, right->clone(), slice_right->clone());
-	left  = new AstNode(AST_ADD, right->clone(), width);
-	return new AstNode(AST_RANGE, left, right);
+	return new AstNode(AST_ADD, lsb_offset, offset);
 }
 
 
@@ -471,24 +477,38 @@ AstNode *AST::make_struct_member_range(AstNode *node, AstNode *member_node)
 		// no range operations apply, return the whole width
 		return make_range(range_left, range_right);
 	}
-	int stride = get_struct_array_width(member_node);
-	if (node->children.size() == 1 && node->children[0]->type == AST_RANGE) {
-		// bit or array indexing e.g. s.a[2] or s.a[1:0]
-		return make_struct_index_range(node, node->children[0], stride, range_right);
+
+	if (node->children.size() != 1) {
+		struct_op_error(node);
 	}
-	else if (node->children.size() == 1 && node->children[0]->type == AST_MULTIRANGE) {
-		// multirange, i.e. bit slice after array index, e.g. s.a[i][p:q]
-		log_assert(stride > 1);
-		auto mrnode = node->children[0];
-		auto element_range = make_struct_index_range(node, mrnode->children[0], stride, range_right);
-		// then apply bit slice range
-		auto range = slice_range(element_range, mrnode->children[1]);
-		delete element_range;
-		return range;
+
+	// Range operations
+	auto rnode = node->children[0];
+	auto lsb_offset = node_int(member_node->range_right);
+	int stride = range_left - range_right + 1;
+	size_t i = 0;
+
+	// Calculate LSB offset for the final index / slice
+	if (rnode->type == AST_RANGE) {
+		lsb_offset = struct_index_lsb_offset(lsb_offset, rnode, member_node, i, stride);
+	}
+	else if (rnode->type == AST_MULTIRANGE) {
+		// Add offset for each dimension
+		auto mrnode = rnode;
+		for (i = 0; i < mrnode->children.size(); i++) {
+			rnode = mrnode->children[i];
+			lsb_offset = struct_index_lsb_offset(lsb_offset, rnode, member_node, i, stride);
+		}
+		i--;  // Step back to the final index / slice
 	}
 	else {
 		struct_op_error(node);
 	}
+
+	// Calculate MSB offset for the final index / slice
+	auto msb_offset = struct_index_msb_offset(lsb_offset->clone(), rnode, member_node, i, stride);
+
+	return new AstNode(AST_RANGE, msb_offset, lsb_offset);
 }
 
 static void add_members_to_scope(AstNode *snode, std::string name)
@@ -996,7 +1016,7 @@ bool AstNode::simplify(bool const_fold, bool at_zero, bool in_lvalue, int stage,
 
 	// create name resolution entries for all objects with names
 	// also merge multiple declarations for the same wire (e.g. "output foobar; reg foobar;")
-	if (type == AST_MODULE) {
+	if (type == AST_MODULE || type == AST_INTERFACE) {
 		current_scope.clear();
 		std::set<std::string> existing;
 		int counter = 0;
@@ -1240,7 +1260,7 @@ bool AstNode::simplify(bool const_fold, bool at_zero, bool in_lvalue, int stage,
 
 				// create the indirection wire
 				std::stringstream sstr;
-				sstr << "$indirect$" << ref->name.c_str() << "$" << filename << ":" << location.first_line << "$" << (autoidx++);
+				sstr << "$indirect$" << ref->name.c_str() << "$" << RTLIL::encode_filename(filename) << ":" << location.first_line << "$" << (autoidx++);
 				std::string tmp_str = sstr.str();
 				add_wire_for_ref(ref, tmp_str);
 
@@ -1587,6 +1607,8 @@ bool AstNode::simplify(bool const_fold, bool at_zero, bool in_lvalue, int stage,
 			break;
 		if (type == AST_GENBLOCK)
 			break;
+		if (type == AST_CELLARRAY && children[i]->type == AST_CELL)
+			continue;
 		if (type == AST_BLOCK && !str.empty())
 			break;
 		if (type == AST_PREFIX && i >= 1)
@@ -1679,7 +1701,7 @@ bool AstNode::simplify(bool const_fold, bool at_zero, bool in_lvalue, int stage,
 
 	current_filename = filename;
 
-	if (type == AST_MODULE)
+	if (type == AST_MODULE || type == AST_INTERFACE)
 		current_scope.clear();
 
 	// convert defparam nodes to cell parameters
@@ -2041,7 +2063,7 @@ bool AstNode::simplify(bool const_fold, bool at_zero, bool in_lvalue, int stage,
 		if (name_has_dot(str, sname)) {
 			if (current_scope.count(str) > 0) {
 				auto item_node = current_scope[str];
-				if (item_node->type == AST_STRUCT_ITEM || item_node->type == AST_STRUCT) {
+				if (item_node->type == AST_STRUCT_ITEM || item_node->type == AST_STRUCT || item_node->type == AST_UNION) {
 					// structure member, rewrite this node to reference the packed struct wire
 					auto range = make_struct_member_range(this, item_node);
 					newNode = new AstNode(AST_IDENTIFIER, range);
@@ -2127,7 +2149,7 @@ bool AstNode::simplify(bool const_fold, bool at_zero, bool in_lvalue, int stage,
 			std::swap(data_range_left, data_range_right);
 
 		std::stringstream sstr;
-		sstr << "$mem2bits$" << str << "$" << filename << ":" << location.first_line << "$" << (autoidx++);
+		sstr << "$mem2bits$" << str << "$" << RTLIL::encode_filename(filename) << ":" << location.first_line << "$" << (autoidx++);
 		std::string wire_id = sstr.str();
 
 		AstNode *wire = new AstNode(AST_WIRE, new AstNode(AST_RANGE, mkconst_int(data_range_left, true), mkconst_int(data_range_right, true)));
@@ -2714,14 +2736,14 @@ bool AstNode::simplify(bool const_fold, bool at_zero, bool in_lvalue, int stage,
 			// mask and shift operations, disabled for now
 
 			AstNode *wire_mask = new AstNode(AST_WIRE, new AstNode(AST_RANGE, mkconst_int(source_width-1, true), mkconst_int(0, true)));
-			wire_mask->str = stringf("$bitselwrite$mask$%s:%d$%d", filename.c_str(), location.first_line, autoidx++);
+			wire_mask->str = stringf("$bitselwrite$mask$%s:%d$%d", RTLIL::encode_filename(filename).c_str(), location.first_line, autoidx++);
 			wire_mask->attributes[ID::nosync] = AstNode::mkconst_int(1, false);
 			wire_mask->is_logic = true;
 			while (wire_mask->simplify(true, false, false, 1, -1, false, false)) { }
 			current_ast_mod->children.push_back(wire_mask);
 
 			AstNode *wire_data = new AstNode(AST_WIRE, new AstNode(AST_RANGE, mkconst_int(source_width-1, true), mkconst_int(0, true)));
-			wire_data->str = stringf("$bitselwrite$data$%s:%d$%d", filename.c_str(), location.first_line, autoidx++);
+			wire_data->str = stringf("$bitselwrite$data$%s:%d$%d", RTLIL::encode_filename(filename).c_str(), location.first_line, autoidx++);
 			wire_data->attributes[ID::nosync] = AstNode::mkconst_int(1, false);
 			wire_data->is_logic = true;
 			while (wire_data->simplify(true, false, false, 1, -1, false, false)) { }
@@ -2732,7 +2754,7 @@ bool AstNode::simplify(bool const_fold, bool at_zero, bool in_lvalue, int stage,
 			shift_expr->detectSignWidth(shamt_width_hint, shamt_sign_hint);
 
 			AstNode *wire_sel = new AstNode(AST_WIRE, new AstNode(AST_RANGE, mkconst_int(shamt_width_hint-1, true), mkconst_int(0, true)));
-			wire_sel->str = stringf("$bitselwrite$sel$%s:%d$%d", filename.c_str(), location.first_line, autoidx++);
+			wire_sel->str = stringf("$bitselwrite$sel$%s:%d$%d", RTLIL::encode_filename(filename).c_str(), location.first_line, autoidx++);
 			wire_sel->attributes[ID::nosync] = AstNode::mkconst_int(1, false);
 			wire_sel->is_logic = true;
 			wire_sel->is_signed = shamt_sign_hint;
@@ -2809,7 +2831,7 @@ skip_dynamic_range_lvalue_expansion:;
 	if (stage > 1 && (type == AST_ASSERT || type == AST_ASSUME || type == AST_LIVE || type == AST_FAIR || type == AST_COVER) && current_block != NULL)
 	{
 		std::stringstream sstr;
-		sstr << "$formal$" << filename << ":" << location.first_line << "$" << (autoidx++);
+		sstr << "$formal$" << RTLIL::encode_filename(filename) << ":" << location.first_line << "$" << (autoidx++);
 		std::string id_check = sstr.str() + "_CHECK", id_en = sstr.str() + "_EN";
 
 		AstNode *wire_check = new AstNode(AST_WIRE);
@@ -2918,7 +2940,7 @@ skip_dynamic_range_lvalue_expansion:;
 			newNode = new AstNode(AST_BLOCK);
 
 			AstNode *wire_tmp = new AstNode(AST_WIRE, new AstNode(AST_RANGE, mkconst_int(width_hint-1, true), mkconst_int(0, true)));
-			wire_tmp->str = stringf("$splitcmplxassign$%s:%d$%d", filename.c_str(), location.first_line, autoidx++);
+			wire_tmp->str = stringf("$splitcmplxassign$%s:%d$%d", RTLIL::encode_filename(filename).c_str(), location.first_line, autoidx++);
 			current_ast_mod->children.push_back(wire_tmp);
 			current_scope[wire_tmp->str] = wire_tmp;
 			wire_tmp->attributes[ID::nosync] = AstNode::mkconst_int(1, false);
@@ -2956,7 +2978,7 @@ skip_dynamic_range_lvalue_expansion:;
 			(children[0]->children.size() == 1 || children[0]->children.size() == 2) && children[0]->children[0]->type == AST_RANGE)
 	{
 		std::stringstream sstr;
-		sstr << "$memwr$" << children[0]->str << "$" << filename << ":" << location.first_line << "$" << (autoidx++);
+		sstr << "$memwr$" << children[0]->str << "$" << RTLIL::encode_filename(filename) << ":" << location.first_line << "$" << (autoidx++);
 		std::string id_addr = sstr.str() + "_ADDR", id_data = sstr.str() + "_DATA", id_en = sstr.str() + "_EN";
 
 		int mem_width, mem_size, addr_bits;
@@ -3228,7 +3250,7 @@ skip_dynamic_range_lvalue_expansion:;
 					AstNode *reg = new AstNode(AST_WIRE, new AstNode(AST_RANGE,
 							mkconst_int(width_hint-1, true), mkconst_int(0, true)));
 
-					reg->str = stringf("$past$%s:%d$%d$%d", filename.c_str(), location.first_line, myidx, i);
+					reg->str = stringf("$past$%s:%d$%d$%d", RTLIL::encode_filename(filename).c_str(), location.first_line, myidx, i);
 					reg->is_reg = true;
 					reg->is_signed = sign_hint;
 
@@ -3656,6 +3678,8 @@ skip_dynamic_range_lvalue_expansion:;
 				goto apply_newNode;
 			}
 
+			if (current_scope.count(str) == 0)
+				str = try_pop_module_prefix();
 			if (current_scope.count(str) == 0 || current_scope[str]->type != AST_FUNCTION)
 				log_file_error(filename, location.first_line, "Can't resolve function name `%s'.\n", str.c_str());
 		}
@@ -3727,13 +3751,15 @@ skip_dynamic_range_lvalue_expansion:;
 				goto apply_newNode;
 			}
 
+			if (current_scope.count(str) == 0)
+				str = try_pop_module_prefix();
 			if (current_scope.count(str) == 0 || current_scope[str]->type != AST_TASK)
 				log_file_error(filename, location.first_line, "Can't resolve task name `%s'.\n", str.c_str());
 		}
 
 
 		std::stringstream sstr;
-		sstr << str << "$func$" << filename << ":" << location.first_line << "$" << (autoidx++) << '.';
+		sstr << str << "$func$" << RTLIL::encode_filename(filename) << ":" << location.first_line << "$" << (autoidx++) << '.';
 		std::string prefix = sstr.str();
 
 		AstNode *decl = current_scope[str];
@@ -4586,7 +4612,7 @@ static void mark_memories_assign_lhs_complex(dict<AstNode*, pool<std::string>> &
 	if (that->type == AST_IDENTIFIER && that->id2ast && that->id2ast->type == AST_MEMORY) {
 		AstNode *mem = that->id2ast;
 		if (!(mem2reg_candidates[mem] & AstNode::MEM2REG_FL_CMPLX_LHS))
-			mem2reg_places[mem].insert(stringf("%s:%d", that->filename.c_str(), that->location.first_line));
+			mem2reg_places[mem].insert(stringf("%s:%d", RTLIL::encode_filename(that->filename).c_str(), that->location.first_line));
 		mem2reg_candidates[mem] |= AstNode::MEM2REG_FL_CMPLX_LHS;
 	}
 }
@@ -4614,14 +4640,14 @@ void AstNode::mem2reg_as_needed_pass1(dict<AstNode*, pool<std::string>> &mem2reg
 			// activate mem2reg if this is assigned in an async proc
 			if (flags & AstNode::MEM2REG_FL_ASYNC) {
 				if (!(mem2reg_candidates[mem] & AstNode::MEM2REG_FL_SET_ASYNC))
-					mem2reg_places[mem].insert(stringf("%s:%d", filename.c_str(), location.first_line));
+					mem2reg_places[mem].insert(stringf("%s:%d", RTLIL::encode_filename(filename).c_str(), location.first_line));
 				mem2reg_candidates[mem] |= AstNode::MEM2REG_FL_SET_ASYNC;
 			}
 
 			// remember if this is assigned blocking (=)
 			if (type == AST_ASSIGN_EQ) {
 				if (!(proc_flags[mem] & AstNode::MEM2REG_FL_EQ1))
-					mem2reg_places[mem].insert(stringf("%s:%d", filename.c_str(), location.first_line));
+					mem2reg_places[mem].insert(stringf("%s:%d", RTLIL::encode_filename(filename).c_str(), location.first_line));
 				proc_flags[mem] |= AstNode::MEM2REG_FL_EQ1;
 			}
 
@@ -4638,11 +4664,11 @@ void AstNode::mem2reg_as_needed_pass1(dict<AstNode*, pool<std::string>> &mem2reg
 			// remember where this is
 			if (flags & MEM2REG_FL_INIT) {
 				if (!(mem2reg_candidates[mem] & AstNode::MEM2REG_FL_SET_INIT))
-					mem2reg_places[mem].insert(stringf("%s:%d", filename.c_str(), location.first_line));
+					mem2reg_places[mem].insert(stringf("%s:%d", RTLIL::encode_filename(filename).c_str(), location.first_line));
 				mem2reg_candidates[mem] |= AstNode::MEM2REG_FL_SET_INIT;
 			} else {
 				if (!(mem2reg_candidates[mem] & AstNode::MEM2REG_FL_SET_ELSE))
-					mem2reg_places[mem].insert(stringf("%s:%d", filename.c_str(), location.first_line));
+					mem2reg_places[mem].insert(stringf("%s:%d", RTLIL::encode_filename(filename).c_str(), location.first_line));
 				mem2reg_candidates[mem] |= AstNode::MEM2REG_FL_SET_ELSE;
 			}
 		}
@@ -4656,7 +4682,7 @@ void AstNode::mem2reg_as_needed_pass1(dict<AstNode*, pool<std::string>> &mem2reg
 
 		// flag if used after blocking assignment (in same proc)
 		if ((proc_flags[mem] & AstNode::MEM2REG_FL_EQ1) && !(mem2reg_candidates[mem] & AstNode::MEM2REG_FL_EQ2)) {
-			mem2reg_places[mem].insert(stringf("%s:%d", filename.c_str(), location.first_line));
+			mem2reg_places[mem].insert(stringf("%s:%d", RTLIL::encode_filename(filename).c_str(), location.first_line));
 			mem2reg_candidates[mem] |= AstNode::MEM2REG_FL_EQ2;
 		}
 	}
@@ -4665,7 +4691,7 @@ void AstNode::mem2reg_as_needed_pass1(dict<AstNode*, pool<std::string>> &mem2reg
 	if (type == AST_MEMORY && (get_bool_attribute(ID::mem2reg) || (flags & AstNode::MEM2REG_FL_ALL) || !(is_reg || is_logic)))
 		mem2reg_candidates[this] |= AstNode::MEM2REG_FL_FORCED;
 
-	if (type == AST_MODULE && get_bool_attribute(ID::mem2reg))
+	if ((type == AST_MODULE || type == AST_INTERFACE) && get_bool_attribute(ID::mem2reg))
 		children_flags |= AstNode::MEM2REG_FL_ALL;
 
 	dict<AstNode*, uint32_t> *proc_flags_p = NULL;
@@ -4679,8 +4705,7 @@ void AstNode::mem2reg_as_needed_pass1(dict<AstNode*, pool<std::string>> &mem2reg
 			children_flags |= AstNode::MEM2REG_FL_ASYNC;
 		proc_flags_p = new dict<AstNode*, uint32_t>;
 	}
-
-	if (type == AST_INITIAL) {
+	else if (type == AST_INITIAL) {
 		children_flags |= AstNode::MEM2REG_FL_INIT;
 		proc_flags_p = new dict<AstNode*, uint32_t>;
 	}
@@ -4846,7 +4871,7 @@ bool AstNode::mem2reg_as_needed_pass2(pool<AstNode*> &mem2reg_set, AstNode *mod,
 			children[0]->children[0]->children[0]->type != AST_CONSTANT)
 	{
 		std::stringstream sstr;
-		sstr << "$mem2reg_wr$" << children[0]->str << "$" << filename << ":" << location.first_line << "$" << (autoidx++);
+		sstr << "$mem2reg_wr$" << children[0]->str << "$" << RTLIL::encode_filename(filename) << ":" << location.first_line << "$" << (autoidx++);
 		std::string id_addr = sstr.str() + "_ADDR", id_data = sstr.str() + "_DATA";
 
 		int mem_width, mem_size, addr_bits;
@@ -4962,7 +4987,7 @@ bool AstNode::mem2reg_as_needed_pass2(pool<AstNode*> &mem2reg_set, AstNode *mod,
 		else
 		{
 			std::stringstream sstr;
-			sstr << "$mem2reg_rd$" << str << "$" << filename << ":" << location.first_line << "$" << (autoidx++);
+			sstr << "$mem2reg_rd$" << str << "$" << RTLIL::encode_filename(filename) << ":" << location.first_line << "$" << (autoidx++);
 			std::string id_addr = sstr.str() + "_ADDR", id_data = sstr.str() + "_DATA";
 
 			int mem_width, mem_size, addr_bits;