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-rw-r--r--passes/abc/blifparse.cc2
1 files changed, 1 insertions, 1 deletions
diff --git a/passes/abc/blifparse.cc b/passes/abc/blifparse.cc
index e5bfb98b4..45a9ac765 100644
--- a/passes/abc/blifparse.cc
+++ b/passes/abc/blifparse.cc
@@ -148,7 +148,7 @@ RTLIL::Design *abc_parse_blif(FILE *f, std::string dff_name)
*(q++) = 0;
if (module->wires.count(RTLIL::escape_id(q)) == 0)
module->addWire(RTLIL::escape_id(q));
- cell->connections()[RTLIL::escape_id(p)] = module->wires.at(RTLIL::escape_id(q));
+ cell->set(RTLIL::escape_id(p), module->wires.at(RTLIL::escape_id(q)));
}
continue;
}