aboutsummaryrefslogtreecommitdiffstats
path: root/passes/cmds/splice.cc
diff options
context:
space:
mode:
Diffstat (limited to 'passes/cmds/splice.cc')
-rw-r--r--passes/cmds/splice.cc2
1 files changed, 1 insertions, 1 deletions
diff --git a/passes/cmds/splice.cc b/passes/cmds/splice.cc
index 20627d601..0f63b91c5 100644
--- a/passes/cmds/splice.cc
+++ b/passes/cmds/splice.cc
@@ -211,7 +211,7 @@ struct SpliceWorker
std::vector<Wire*> mod_wires = module->wires();
for (auto wire : mod_wires)
- if ((!no_outputs && wire->port_output) || (do_wires && wire->name[0] == '\\')) {
+ if ((!no_outputs && wire->port_output) || (do_wires && wire->name.isPublic())) {
if (!design->selected(module, wire))
continue;
RTLIL::SigSpec sig = sigmap(wire);