diff options
Diffstat (limited to 'passes/hierarchy')
| -rw-r--r-- | passes/hierarchy/hierarchy.cc | 8 | ||||
| -rw-r--r-- | passes/hierarchy/singleton.cc | 2 | ||||
| -rw-r--r-- | passes/hierarchy/submod.cc | 6 |
3 files changed, 8 insertions, 8 deletions
diff --git a/passes/hierarchy/hierarchy.cc b/passes/hierarchy/hierarchy.cc index 129f48399..460b3c693 100644 --- a/passes/hierarchy/hierarchy.cc +++ b/passes/hierarchy/hierarchy.cc @@ -396,7 +396,7 @@ struct HierarchyPass : public Pass { } virtual void execute(std::vector<std::string> args, RTLIL::Design *design) { - log_header("Executing HIERARCHY pass (managing design hierarchy).\n"); + log_header(design, "Executing HIERARCHY pass (managing design hierarchy).\n"); bool flag_check = false; bool purge_lib = false; @@ -506,7 +506,7 @@ struct HierarchyPass : public Pass { top_mod = mod_it.second; if (top_mod == nullptr && auto_top_mode) { - log_header("Finding top of design hierarchy..\n"); + log_header(design, "Finding top of design hierarchy..\n"); dict<Module*, int> db; for (Module *mod : design->selected_modules()) { int score = find_top_mod_score(design, mod, db); @@ -525,7 +525,7 @@ struct HierarchyPass : public Pass { std::set<RTLIL::Module*> used_modules; if (top_mod != NULL) { - log_header("Analyzing design hierarchy..\n"); + log_header(design, "Analyzing design hierarchy..\n"); hierarchy_worker(design, used_modules, top_mod, 0); } else { for (auto mod : design->modules()) @@ -539,7 +539,7 @@ struct HierarchyPass : public Pass { } if (top_mod != NULL) { - log_header("Analyzing design hierarchy..\n"); + log_header(design, "Analyzing design hierarchy..\n"); hierarchy_clean(design, top_mod, purge_lib); } diff --git a/passes/hierarchy/singleton.cc b/passes/hierarchy/singleton.cc index 5715c0eb1..03c365fb5 100644 --- a/passes/hierarchy/singleton.cc +++ b/passes/hierarchy/singleton.cc @@ -43,7 +43,7 @@ struct SingletonPass : public Pass { } virtual void execute(std::vector<std::string> args, RTLIL::Design *design) { - log_header("Executing SINGLETON pass (creating singleton modules).\n"); + log_header(design, "Executing SINGLETON pass (creating singleton modules).\n"); size_t argidx; for (argidx = 1; argidx < args.size(); argidx++) diff --git a/passes/hierarchy/submod.cc b/passes/hierarchy/submod.cc index d4e8c96ca..9f312f82d 100644 --- a/passes/hierarchy/submod.cc +++ b/passes/hierarchy/submod.cc @@ -298,7 +298,7 @@ struct SubmodPass : public Pass { } virtual void execute(std::vector<std::string> args, RTLIL::Design *design) { - log_header("Executing SUBMOD pass (moving cells to submodules as requested).\n"); + log_header(design, "Executing SUBMOD pass (moving cells to submodules as requested).\n"); log_push(); std::string opt_name; @@ -321,7 +321,7 @@ struct SubmodPass : public Pass { if (opt_name.empty()) { Pass::call(design, "opt_clean"); - log_header("Continuing SUBMOD pass.\n"); + log_header(design, "Continuing SUBMOD pass.\n"); std::set<RTLIL::IdString> handled_modules; @@ -356,7 +356,7 @@ struct SubmodPass : public Pass { log("Nothing selected -> do nothing.\n"); else { Pass::call_on_module(design, module, "opt_clean"); - log_header("Continuing SUBMOD pass.\n"); + log_header(design, "Continuing SUBMOD pass.\n"); SubmodWorker worker(design, module, copy_mode, opt_name); } } |