diff options
Diffstat (limited to 'passes/memory/memory_share.cc')
| -rw-r--r-- | passes/memory/memory_share.cc | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/passes/memory/memory_share.cc b/passes/memory/memory_share.cc index ca09ac52c..eb912cfd4 100644 --- a/passes/memory/memory_share.cc +++ b/passes/memory/memory_share.cc @@ -155,7 +155,7 @@ struct MemoryShareWorker { bool ignore_data_port = false; - if (cell->type == "$mux" || cell->type == "$pmux") + if (cell->type.in("$mux", "$pmux")) { std::vector<RTLIL::SigBit> sig_a = sigmap(cell->getPort("\\A")); std::vector<RTLIL::SigBit> sig_b = sigmap(cell->getPort("\\B")); @@ -173,7 +173,7 @@ struct MemoryShareWorker continue; } - if ((cell->type == "$memwr" || cell->type == "$memrd") && + if (cell->type.in("$memwr", "$memrd") && cell->parameters.at("\\MEMID").decode_string() == memid) ignore_data_port = true; @@ -690,7 +690,7 @@ struct MemoryShareWorker sigmap_xmux.add(cell->getPort("\\Y"), sig_a); } - if (cell->type == "$mux" || cell->type == "$pmux") + if (cell->type.in("$mux", "$pmux")) { std::vector<RTLIL::SigBit> sig_y = sigmap(cell->getPort("\\Y")); for (int i = 0; i < int(sig_y.size()); i++) @@ -726,7 +726,7 @@ struct MemoryShareWorker struct MemorySharePass : public Pass { MemorySharePass() : Pass("memory_share", "consolidate memory ports") { } - virtual void help() + void help() YS_OVERRIDE { // |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---| log("\n"); @@ -752,7 +752,7 @@ struct MemorySharePass : public Pass { log("optimizations) such as \"share\" and \"opt_merge\".\n"); log("\n"); } - virtual void execute(std::vector<std::string> args, RTLIL::Design *design) { + void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE { log_header(design, "Executing MEMORY_SHARE pass (consolidating $memrd/$memwr cells).\n"); extra_args(args, 1, design); for (auto module : design->selected_modules()) |