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-rw-r--r--passes/proc/proc_init.cc16
1 files changed, 2 insertions, 14 deletions
diff --git a/passes/proc/proc_init.cc b/passes/proc/proc_init.cc
index eb323038d..4da20c395 100644
--- a/passes/proc/proc_init.cc
+++ b/passes/proc/proc_init.cc
@@ -1,7 +1,7 @@
/*
* yosys -- Yosys Open SYnthesis Suite
*
- * Copyright (C) 2012 Clifford Wolf <clifford@clifford.at>
+ * Copyright (C) 2012 Claire Xenia Wolf <claire@yosyshq.com>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@@ -28,12 +28,9 @@ PRIVATE_NAMESPACE_BEGIN
void proc_init(RTLIL::Module *mod, SigMap &sigmap, RTLIL::Process *proc)
{
- bool found_init = false;
-
for (auto &sync : proc->syncs)
if (sync->type == RTLIL::SyncType::STi)
{
- found_init = true;
log("Found init rule in `%s.%s'.\n", mod->name.c_str(), proc->name.c_str());
for (auto &action : sync->actions)
@@ -71,17 +68,8 @@ void proc_init(RTLIL::Module *mod, SigMap &sigmap, RTLIL::Process *proc)
offset += lhs_c.width;
}
}
+ sync->actions.clear();
}
-
- if (found_init) {
- std::vector<RTLIL::SyncRule*> new_syncs;
- for (auto &sync : proc->syncs)
- if (sync->type == RTLIL::SyncType::STi)
- delete sync;
- else
- new_syncs.push_back(sync);
- proc->syncs.swap(new_syncs);
- }
}
struct ProcInitPass : public Pass {