1 files changed, 1 insertions, 1 deletions
diff --git a/passes/tests/test_autotb.cc b/passes/tests/test_autotb.cc
index 659f0bb69..bb516fca9 100644
--- a/passes/tests/test_autotb.cc
+++ b/passes/tests/test_autotb.cc
@@ -310,7 +310,7 @@ struct TestAutotbBackend : public Backend {
 		log("\n");
 		log("    test_autotb [options] [filename]\n");
 		log("\n");
-		log("Automatically create primitive verilog test benches for all modules in the\n");
+		log("Automatically create primitive Verilog test benches for all modules in the\n");
 		log("design. The generated testbenches toggle the input pins of the module in\n");
 		log("a semi-random manner and dumps the resulting output signals.\n");
 		log("\n");