diff options
Diffstat (limited to 'passes/tests/test_cell.cc')
| -rw-r--r-- | passes/tests/test_cell.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/passes/tests/test_cell.cc b/passes/tests/test_cell.cc index bd3749b71..abac62231 100644 --- a/passes/tests/test_cell.cc +++ b/passes/tests/test_cell.cc @@ -556,7 +556,7 @@ struct TestCellPass : public Pass { log(" print additional debug information to the console\n"); log("\n"); log(" -vlog {filename}\n"); - log(" create a verilog test bench to test simlib and write_verilog\n"); + log(" create a Verilog test bench to test simlib and write_verilog\n"); log("\n"); } virtual void execute(std::vector<std::string> args, RTLIL::Design*) |