diff options
Diffstat (limited to 'passes')
| -rw-r--r-- | passes/opt/opt_expr.cc | 8 | ||||
| -rw-r--r-- | passes/techmap/dfflegalize.cc | 2 |
2 files changed, 9 insertions, 1 deletions
diff --git a/passes/opt/opt_expr.cc b/passes/opt/opt_expr.cc index 1051a59f2..649ad83a6 100644 --- a/passes/opt/opt_expr.cc +++ b/passes/opt/opt_expr.cc @@ -1596,6 +1596,14 @@ skip_identity: log_debug("Removing low %d A and %d B bits from cell `%s' in module `%s'.\n", a_zeros, b_zeros, cell->name.c_str(), module->name.c_str()); + if (y_zeros >= GetSize(sig_y)) { + module->connect(sig_y, RTLIL::SigSpec(0, GetSize(sig_y))); + module->remove(cell); + + did_something = true; + goto next_cell; + } + if (a_zeros) { cell->setPort(ID::A, sig_a.extract_end(a_zeros)); cell->parameters[ID::A_WIDTH] = GetSize(sig_a) - a_zeros; diff --git a/passes/techmap/dfflegalize.cc b/passes/techmap/dfflegalize.cc index 7f2cdc6ac..b2fe90702 100644 --- a/passes/techmap/dfflegalize.cc +++ b/passes/techmap/dfflegalize.cc @@ -364,7 +364,7 @@ flip_dqi: // Some DFF is supported with this init val. Just pick a type. if (ff_type == FF_DFF) { // Try adding a set or reset pin. - for (auto new_type: {FF_ADFF0, FF_ADFF1, FF_SDFF0, FF_SDFF1}) + for (auto new_type: {FF_SDFF0, FF_SDFF1, FF_ADFF0, FF_ADFF1}) if (supported_cells[new_type] & initmask) { ff_type = new_type; sig_r = State::S0; |