1 files changed, 38 insertions, 0 deletions
diff --git a/techlibs/common/simcells.v b/techlibs/common/simcells.v
index a2a377350..eb62d7830 100644
--- a/techlibs/common/simcells.v
+++ b/techlibs/common/simcells.v
@@ -25,6 +25,12 @@
  *
  */
 
+module  \$_BUF_ (A, Y);
+input A;
+output Y;
+assign Y = A;
+endmodule
+
 module  \$_NOT_ (A, Y);
 input A;
 output Y;
@@ -157,6 +163,38 @@ always @(posedge C) begin
 end
 endmodule
 
+module  \$_DFFE_NN_ (D, Q, C, E);
+input D, C, E;
+output reg Q;
+always @(negedge C) begin
+	if (!E) Q <= D;
+end
+endmodule
+
+module  \$_DFFE_NP_ (D, Q, C, E);
+input D, C, E;
+output reg Q;
+always @(negedge C) begin
+	if (E) Q <= D;
+end
+endmodule
+
+module  \$_DFFE_PN_ (D, Q, C, E);
+input D, C, E;
+output reg Q;
+always @(posedge C) begin
+	if (!E) Q <= D;
+end
+endmodule
+
+module  \$_DFFE_PP_ (D, Q, C, E);
+input D, C, E;
+output reg Q;
+always @(posedge C) begin
+	if (E) Q <= D;
+end
+endmodule
+
 module  \$_DFF_NN0_ (D, Q, C, R);
 input D, C, R;
 output reg Q;