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-rw-r--r--techlibs/common/simlib.v13
1 files changed, 13 insertions, 0 deletions
diff --git a/techlibs/common/simlib.v b/techlibs/common/simlib.v
index 922a47cab..db818269b 100644
--- a/techlibs/common/simlib.v
+++ b/techlibs/common/simlib.v
@@ -1383,6 +1383,19 @@ endmodule
`endif
// --------------------------------------------------------
+module \$ff (D, Q);
+
+parameter WIDTH = 0;
+
+input [WIDTH-1:0] D;
+output [WIDTH-1:0] Q;
+
+assign D = Q;
+
+endmodule
+
+// --------------------------------------------------------
+
module \$dff (CLK, D, Q);
parameter WIDTH = 0;