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-rw-r--r--techlibs/common/synth.cc192
1 files changed, 111 insertions, 81 deletions
diff --git a/techlibs/common/synth.cc b/techlibs/common/synth.cc
index 69ef5bc55..859a6606f 100644
--- a/techlibs/common/synth.cc
+++ b/techlibs/common/synth.cc
@@ -2,11 +2,11 @@
* yosys -- Yosys Open SYnthesis Suite
*
* Copyright (C) 2012 Clifford Wolf <clifford@clifford.at>
- *
+ *
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
- *
+ *
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
@@ -25,22 +25,11 @@
USING_YOSYS_NAMESPACE
PRIVATE_NAMESPACE_BEGIN
-bool check_label(bool &active, std::string run_from, std::string run_to, std::string label)
+struct SynthPass : public ScriptPass
{
- if (!run_from.empty() && run_from == run_to) {
- active = (label == run_from);
- } else {
- if (label == run_from)
- active = true;
- if (label == run_to)
- active = false;
- }
- return active;
-}
+ SynthPass() : ScriptPass("synth", "generic synthesis script") { }
-struct SynthPass : public Pass {
- SynthPass() : Pass("synth", "generic synthesis script") { }
- virtual void help()
+ virtual void help() YS_OVERRIDE
{
// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
log("\n");
@@ -52,12 +41,26 @@ struct SynthPass : public Pass {
log(" -top <module>\n");
log(" use the specified module as top module (default='top')\n");
log("\n");
+ log(" -flatten\n");
+ log(" flatten the design before synthesis. this will pass '-auto-top' to\n");
+ log(" 'hierarchy' if no top module is specified.\n");
+ log("\n");
log(" -encfile <file>\n");
log(" passed to 'fsm_recode' via 'fsm'\n");
log("\n");
+ log(" -nofsm\n");
+ log(" do not run FSM optimization\n");
+ log("\n");
log(" -noabc\n");
log(" do not run abc (as if yosys was compiled without ABC support)\n");
log("\n");
+ log(" -noalumacc\n");
+ log(" do not run 'alumacc' pass. i.e. keep arithmetic operators in\n");
+ log(" their direct form ($add, $sub, etc.).\n");
+ log("\n");
+ log(" -nordff\n");
+ log(" passed to 'memory'. prohibits merging of FFs into memory read ports\n");
+ log("\n");
log(" -run <from_label>[:<to_label>]\n");
log(" only run the commands between the labels (see below). an empty\n");
log(" from label is synonymous to 'begin', and empty to label is\n");
@@ -65,41 +68,29 @@ struct SynthPass : public Pass {
log("\n");
log("\n");
log("The following commands are executed by this synthesis command:\n");
- log("\n");
- log(" begin:\n");
- log(" hierarchy -check [-top <top>]\n");
- log("\n");
- log(" coarse:\n");
- log(" proc\n");
- log(" opt\n");
- log(" wreduce\n");
- log(" alumacc\n");
- log(" share\n");
- log(" opt\n");
- log(" fsm\n");
- log(" opt -fast\n");
- log(" memory -nomap\n");
- log(" opt_clean\n");
- log("\n");
- log(" fine:\n");
- log(" opt -fast -full\n");
- log(" memory_map\n");
- log(" opt -full\n");
- log(" techmap\n");
- log(" opt -fast\n");
- #ifdef YOSYS_ENABLE_ABC
- log("\n");
- log(" abc:\n");
- log(" abc -fast\n");
- log(" opt -fast\n");
- #endif
+ help_script();
log("\n");
}
- virtual void execute(std::vector<std::string> args, RTLIL::Design *design)
+
+ string top_module, fsm_opts, memory_opts;
+ bool flatten, noalumacc, nofsm, noabc;
+
+ virtual void clear_flags() YS_OVERRIDE
{
- std::string top_module, fsm_opts;
- std::string run_from, run_to;
- bool noabc = false;
+ top_module.clear();
+ fsm_opts.clear();
+ memory_opts.clear();
+
+ flatten = false;
+ noalumacc = false;
+ nofsm = false;
+ noabc = false;
+ }
+
+ virtual void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
+ {
+ string run_from, run_to;
+ clear_flags();
size_t argidx;
for (argidx = 1; argidx < args.size(); argidx++)
@@ -123,10 +114,26 @@ struct SynthPass : public Pass {
}
continue;
}
+ if (args[argidx] == "-flatten") {
+ flatten = true;
+ continue;
+ }
+ if (args[argidx] == "-nofsm") {
+ nofsm = true;
+ continue;
+ }
if (args[argidx] == "-noabc") {
noabc = true;
continue;
}
+ if (args[argidx] == "-noalumacc") {
+ noalumacc = true;
+ continue;
+ }
+ if (args[argidx] == "-nordff") {
+ memory_opts += " -nordff";
+ continue;
+ }
break;
}
extra_args(args, argidx, design);
@@ -134,52 +141,75 @@ struct SynthPass : public Pass {
if (!design->full_selection())
log_cmd_error("This comannd only operates on fully selected designs!\n");
- bool active = run_from.empty();
-
- log_header("Executing SYNTH pass.\n");
+ log_header(design, "Executing SYNTH pass.\n");
log_push();
- if (check_label(active, run_from, run_to, "begin"))
+ run_script(design, run_from, run_to);
+
+ log_pop();
+ }
+
+ virtual void script() YS_OVERRIDE
+ {
+ if (check_label("begin"))
{
- if (top_module.empty())
- Pass::call(design, stringf("hierarchy -check"));
- else
- Pass::call(design, stringf("hierarchy -check -top %s", top_module.c_str()));
+ if (help_mode) {
+ run("hierarchy -check [-top <top>]");
+ } else {
+ if (top_module.empty()) {
+ if (flatten)
+ run("hierarchy -check -auto-top");
+ else
+ run("hierarchy -check");
+ } else
+ run(stringf("hierarchy -check -top %s", top_module.c_str()));
+ }
}
- if (check_label(active, run_from, run_to, "coarse"))
+ if (check_label("coarse"))
{
- Pass::call(design, "proc");
- Pass::call(design, "opt");
- Pass::call(design, "wreduce");
- Pass::call(design, "alumacc");
- Pass::call(design, "share");
- Pass::call(design, "opt");
- Pass::call(design, "fsm" + fsm_opts);
- Pass::call(design, "opt -fast");
- Pass::call(design, "memory -nomap");
- Pass::call(design, "opt_clean");
+ run("proc");
+ if (help_mode || flatten)
+ run("flatten", "(if -flatten)");
+ run("opt_expr");
+ run("opt_clean");
+ run("check");
+ run("opt");
+ run("wreduce");
+ if (!noalumacc)
+ run("alumacc");
+ run("share");
+ run("opt");
+ if (!nofsm)
+ run("fsm" + fsm_opts);
+ run("opt -fast");
+ run("memory -nomap" + memory_opts);
+ run("opt_clean");
}
- if (check_label(active, run_from, run_to, "fine"))
+ if (check_label("fine"))
{
- Pass::call(design, "opt -fast -full");
- Pass::call(design, "memory_map");
- Pass::call(design, "opt -full");
- Pass::call(design, "techmap");
- Pass::call(design, "opt -fast");
+ run("opt -fast -full");
+ run("memory_map");
+ run("opt -full");
+ run("techmap");
+ run("opt -fast");
+
+ if (!noabc) {
+ #ifdef YOSYS_ENABLE_ABC
+ run("abc -fast");
+ run("opt -fast");
+ #endif
+ }
}
- #ifdef YOSYS_ENABLE_ABC
- if (check_label(active, run_from, run_to, "abc") && !noabc)
+ if (check_label("check"))
{
- Pass::call(design, "abc -fast");
- Pass::call(design, "opt -fast");
+ run("hierarchy -check");
+ run("stat");
+ run("check");
}
- #endif
-
- log_pop();
}
} SynthPass;
-
+
PRIVATE_NAMESPACE_END
generated by cgit v1.2.3 (git 2.25.1) at 2025-04-22 18:11:07 +0000