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-rw-r--r--techlibs/common/Makefile.inc1
-rw-r--r--techlibs/common/simlib.v9
-rw-r--r--techlibs/common/smtmap.v28
3 files changed, 31 insertions, 7 deletions
diff --git a/techlibs/common/Makefile.inc b/techlibs/common/Makefile.inc
index 607e772a2..47f1ed604 100644
--- a/techlibs/common/Makefile.inc
+++ b/techlibs/common/Makefile.inc
@@ -22,6 +22,7 @@ kernel/register.o: techlibs/common/simlib_help.inc techlibs/common/simcells_help
$(eval $(call add_share_file,share,techlibs/common/simlib.v))
$(eval $(call add_share_file,share,techlibs/common/simcells.v))
$(eval $(call add_share_file,share,techlibs/common/techmap.v))
+$(eval $(call add_share_file,share,techlibs/common/smtmap.v))
$(eval $(call add_share_file,share,techlibs/common/pmux2mux.v))
$(eval $(call add_share_file,share,techlibs/common/adff2dff.v))
$(eval $(call add_share_file,share,techlibs/common/dff2ff.v))
diff --git a/techlibs/common/simlib.v b/techlibs/common/simlib.v
index ab9bd7e1d..e64697efb 100644
--- a/techlibs/common/simlib.v
+++ b/techlibs/common/simlib.v
@@ -1279,14 +1279,9 @@ parameter WIDTH = 0;
input [WIDTH-1:0] A, B;
input S;
-output reg [WIDTH-1:0] Y;
+output [WIDTH-1:0] Y;
-always @* begin
- if (S)
- Y = B;
- else
- Y = A;
-end
+assign Y = S ? B : A;
endmodule
diff --git a/techlibs/common/smtmap.v b/techlibs/common/smtmap.v
new file mode 100644
index 000000000..8c7503dc8
--- /dev/null
+++ b/techlibs/common/smtmap.v
@@ -0,0 +1,28 @@
+(* techmap_celltype = "$pmux" *)
+module smt_pmux (A, B, S, Y);
+ parameter WIDTH = 1;
+ parameter S_WIDTH = 1;
+
+ (* force_downto *)
+ input [WIDTH-1:0] A;
+ (* force_downto *)
+ input [WIDTH*S_WIDTH-1:0] B;
+ (* force_downto *)
+ input [S_WIDTH-1:0] S;
+ (* force_downto *)
+ output [WIDTH-1:0] Y;
+
+ (* force_downto *)
+ wire [WIDTH-1:0] Y_B;
+
+ genvar i, j;
+ generate
+ (* force_downto *)
+ wire [WIDTH*(S_WIDTH+1)-1:0] C;
+
+ assign C[WIDTH-1:0] = A;
+ for (i = 0; i < S_WIDTH; i = i + 1)
+ assign C[WIDTH*(i+2)-1:WIDTH*(i+1)] = S[i] ? B[WIDTH*(i+1)-1:WIDTH*i] : C[WIDTH*(i+1)-1:WIDTH*i];
+ assign Y = C[WIDTH*(S_WIDTH+1)-1:WIDTH*S_WIDTH];
+ endgenerate
+endmodule