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-rw-r--r--techlibs/coolrunner2/cells_sim.v40
1 files changed, 40 insertions, 0 deletions
diff --git a/techlibs/coolrunner2/cells_sim.v b/techlibs/coolrunner2/cells_sim.v
index 52326fbb3..f9f990c22 100644
--- a/techlibs/coolrunner2/cells_sim.v
+++ b/techlibs/coolrunner2/cells_sim.v
@@ -54,3 +54,43 @@ module MACROCELL_XOR(IN_PTC, IN_ORTERM, OUT);
assign OUT = INVERT_OUT ? ~xor_intermed : xor_intermed;
assign xor_intermed = IN_ORTERM ^ IN_PTC;
endmodule
+
+module FDCP (C, PRE, CLR, D, Q);
+ parameter INIT = 0;
+
+ input C, PRE, CLR, D;
+ output reg Q;
+
+ initial begin
+ Q <= INIT;
+ end
+
+ always @(posedge C, posedge PRE, posedge CLR) begin
+ if (CLR == 1)
+ Q <= 0;
+ else if (PRE == 1)
+ Q <= 1;
+ else
+ Q <= D;
+ end
+endmodule
+
+module FDCP_N (C, PRE, CLR, D, Q);
+ parameter INIT = 0;
+
+ input C, PRE, CLR, D;
+ output reg Q;
+
+ initial begin
+ Q <= INIT;
+ end
+
+ always @(negedge C, posedge PRE, posedge CLR) begin
+ if (CLR == 1)
+ Q <= 0;
+ else if (PRE == 1)
+ Q <= 1;
+ else
+ Q <= D;
+ end
+endmodule