1 files changed, 0 insertions, 54 deletions
diff --git a/techlibs/coolrunner2/coolrunner2_sop.cc b/techlibs/coolrunner2/coolrunner2_sop.cc
index de0cbb29d..49ae8e21a 100644
--- a/techlibs/coolrunner2/coolrunner2_sop.cc
+++ b/techlibs/coolrunner2/coolrunner2_sop.cc
@@ -248,60 +248,6 @@ struct Coolrunner2SopPass : public Pass {
 				}
 			}
 
-			// In some cases we can get a FF feeding straight into an FF. This is not possible, so we need to insert
-			// some AND/XOR cells in the middle to make it actually work.
-
-			// Find all the FF outputs
-			pool<SigBit> sig_fed_by_ff;
-			for (auto cell : module->selected_cells())
-			{
-				if (cell->type.in("\\FDCP", "\\FDCP_N", "\\FDDCP", "\\LDCP", "\\LDCP_N",
-							"\\FTCP", "\\FTCP_N", "\\FTDCP", "\\FDCPE", "\\FDCPE_N", "\\FDDCPE"))
-				{
-					auto output = sigmap(cell->getPort("\\Q")[0]);
-					sig_fed_by_ff.insert(output);
-				}
-			}
-
-			// Look at all the FF inputs
-			for (auto cell : module->selected_cells())
-			{
-				if (cell->type.in("\\FDCP", "\\FDCP_N", "\\FDDCP", "\\LDCP", "\\LDCP_N",
-							"\\FTCP", "\\FTCP_N", "\\FTDCP", "\\FDCPE", "\\FDCPE_N", "\\FDDCPE"))
-				{
-					SigBit input;
-					if (cell->type.in("\\FTCP", "\\FTCP_N", "\\FTDCP"))
-						input = sigmap(cell->getPort("\\T")[0]);
-					else
-						input = sigmap(cell->getPort("\\D")[0]);
-
-					if (sig_fed_by_ff[input])
-					{
-						printf("Buffering input to \"%s\"\n", cell->name.c_str());
-
-						auto and_to_xor_wire = module->addWire(NEW_ID);
-						auto xor_to_ff_wire = module->addWire(NEW_ID);
-
-						auto and_cell = module->addCell(NEW_ID, "\\ANDTERM");
-						and_cell->setParam("\\TRUE_INP", 1);
-						and_cell->setParam("\\COMP_INP", 0);
-						and_cell->setPort("\\OUT", and_to_xor_wire);
-						and_cell->setPort("\\IN", input);
-						and_cell->setPort("\\IN_B", SigSpec());
-
-						auto xor_cell = module->addCell(NEW_ID, "\\MACROCELL_XOR");
-						xor_cell->setParam("\\INVERT_OUT", false);
-						xor_cell->setPort("\\IN_PTC", and_to_xor_wire);
-						xor_cell->setPort("\\OUT", xor_to_ff_wire);
-
-						if (cell->type.in("\\FTCP", "\\FTCP_N", "\\FTDCP"))
-							cell->setPort("\\T", xor_to_ff_wire);
-						else
-							cell->setPort("\\D", xor_to_ff_wire);
-					}
-				}
-			}
-
 			// Actually do the removal now that we aren't iterating
 			for (auto cell : cells_to_remove)
 			{