diff options
Diffstat (limited to 'techlibs/coolrunner2/synth_coolrunner2.cc')
| -rw-r--r-- | techlibs/coolrunner2/synth_coolrunner2.cc | 33 |
1 files changed, 23 insertions, 10 deletions
diff --git a/techlibs/coolrunner2/synth_coolrunner2.cc b/techlibs/coolrunner2/synth_coolrunner2.cc index 562cce460..388e2b792 100644 --- a/techlibs/coolrunner2/synth_coolrunner2.cc +++ b/techlibs/coolrunner2/synth_coolrunner2.cc @@ -29,7 +29,7 @@ struct SynthCoolrunner2Pass : public ScriptPass { SynthCoolrunner2Pass() : ScriptPass("synth_coolrunner2", "synthesis for Xilinx Coolrunner-II CPLDs") { } - virtual void help() YS_OVERRIDE + void help() YS_OVERRIDE { // |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---| log("\n"); @@ -55,7 +55,7 @@ struct SynthCoolrunner2Pass : public ScriptPass log(" do not flatten design before synthesis\n"); log("\n"); log(" -retime\n"); - log(" run 'abc' with -dff option\n"); + log(" run 'abc' with '-dff -D 1' options\n"); log("\n"); log("\n"); log("The following commands are executed by this synthesis command:\n"); @@ -66,7 +66,7 @@ struct SynthCoolrunner2Pass : public ScriptPass string top_opt, json_file; bool flatten, retime; - virtual void clear_flags() YS_OVERRIDE + void clear_flags() YS_OVERRIDE { top_opt = "-auto-top"; json_file = ""; @@ -74,7 +74,7 @@ struct SynthCoolrunner2Pass : public ScriptPass retime = false; } - virtual void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE + void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE { string run_from, run_to; clear_flags(); @@ -111,7 +111,7 @@ struct SynthCoolrunner2Pass : public ScriptPass extra_args(args, argidx, design); if (!design->full_selection()) - log_cmd_error("This comannd only operates on fully selected designs!\n"); + log_cmd_error("This command only operates on fully selected designs!\n"); log_header(design, "Executing SYNTH_COOLRUNNER2 pass.\n"); log_push(); @@ -121,7 +121,7 @@ struct SynthCoolrunner2Pass : public ScriptPass log_pop(); } - virtual void script() YS_OVERRIDE + void script() YS_OVERRIDE { if (check_label("begin")) { @@ -129,7 +129,7 @@ struct SynthCoolrunner2Pass : public ScriptPass run(stringf("hierarchy -check %s", help_mode ? "-top <top>" : top_opt.c_str())); } - if (check_label("flatten", "(unless -noflatten)") && flatten) + if (flatten && check_label("flatten", "(unless -noflatten)")) { run("proc"); run("flatten"); @@ -149,9 +149,19 @@ struct SynthCoolrunner2Pass : public ScriptPass run("dfflibmap -prepare -liberty +/coolrunner2/xc2_dff.lib"); } + if (check_label("map_tff")) + { + // This is quite hacky. By telling abc that it can only use AND and XOR gates, abc will try and use XOR + // gates "whenever possible." This will hopefully cause toggle flip-flop structures to turn into an XOR + // connected to a D flip-flop. We then match on these and convert them into XC2 TFF cells. + run("abc -g AND,XOR"); + run("clean"); + run("extract -map +/coolrunner2/tff_extract.v"); + } + if (check_label("map_pla")) { - run("abc -sop -I 40 -P 56"); + run("abc -sop -I 40 -P 56" + string(retime ? " -dff -D 1" : "")); run("clean"); } @@ -160,10 +170,15 @@ struct SynthCoolrunner2Pass : public ScriptPass run("dfflibmap -liberty +/coolrunner2/xc2_dff.lib"); run("dffinit -ff FDCP Q INIT"); run("dffinit -ff FDCP_N Q INIT"); + run("dffinit -ff FTCP Q INIT"); + run("dffinit -ff FTCP_N Q INIT"); run("dffinit -ff LDCP Q INIT"); run("dffinit -ff LDCP_N Q INIT"); run("coolrunner2_sop"); run("iopadmap -bits -inpad IBUF O:I -outpad IOBUFE I:IO -inoutpad IOBUFE O:IO -toutpad IOBUFE E:I:IO -tinoutpad IOBUFE E:O:I:IO"); + run("attrmvcp -attr src -attr LOC t:IOBUFE n:*"); + run("attrmvcp -attr src -attr LOC -driven t:IBUF n:*"); + run("splitnets"); run("clean"); } @@ -179,8 +194,6 @@ struct SynthCoolrunner2Pass : public ScriptPass if (!json_file.empty() || help_mode) run(stringf("write_json %s", help_mode ? "<file-name>" : json_file.c_str())); } - - log_pop(); } } SynthCoolrunner2Pass; |