diff options
Diffstat (limited to 'techlibs/efinix')
| -rw-r--r-- | techlibs/efinix/arith_map.v | 11 | ||||
| -rw-r--r-- | techlibs/efinix/cells_map.v | 1 | ||||
| -rw-r--r-- | techlibs/efinix/efinix_fixcarry.cc | 4 | ||||
| -rw-r--r-- | techlibs/efinix/efinix_gbuf.cc | 4 | ||||
| -rw-r--r-- | techlibs/efinix/synth_efinix.cc | 8 |
5 files changed, 19 insertions, 9 deletions
diff --git a/techlibs/efinix/arith_map.v b/techlibs/efinix/arith_map.v index 178f57bc5..4dac360b9 100644 --- a/techlibs/efinix/arith_map.v +++ b/techlibs/efinix/arith_map.v @@ -26,24 +26,33 @@ module _80_efinix_alu (A, B, CI, BI, X, Y, CO); parameter B_WIDTH = 1; parameter Y_WIDTH = 1; + (* force_downto *) input [A_WIDTH-1:0] A; + (* force_downto *) input [B_WIDTH-1:0] B; + (* force_downto *) output [Y_WIDTH-1:0] X, Y; input CI, BI; + (* force_downto *) output [Y_WIDTH-1:0] CO; wire CIx; + (* force_downto *) wire [Y_WIDTH-1:0] COx; wire _TECHMAP_FAIL_ = Y_WIDTH <= 2; + (* force_downto *) wire [Y_WIDTH-1:0] A_buf, B_buf; \$pos #(.A_SIGNED(A_SIGNED), .A_WIDTH(A_WIDTH), .Y_WIDTH(Y_WIDTH)) A_conv (.A(A), .Y(A_buf)); \$pos #(.A_SIGNED(B_SIGNED), .A_WIDTH(B_WIDTH), .Y_WIDTH(Y_WIDTH)) B_conv (.A(B), .Y(B_buf)); + (* force_downto *) wire [Y_WIDTH-1:0] AA = A_buf; + (* force_downto *) wire [Y_WIDTH-1:0] BB = BI ? ~B_buf : B_buf; + (* force_downto *) wire [Y_WIDTH-1:0] C = { COx, CIx }; EFX_ADD #(.I0_POLARITY(1'b1),.I1_POLARITY(1'b1)) @@ -76,4 +85,4 @@ module _80_efinix_alu (A, B, CI, BI, X, Y, CO); /* End implementation */ assign X = AA ^ BB; -endmodule
\ No newline at end of file +endmodule diff --git a/techlibs/efinix/cells_map.v b/techlibs/efinix/cells_map.v index 3ecec3bac..1090f8b27 100644 --- a/techlibs/efinix/cells_map.v +++ b/techlibs/efinix/cells_map.v @@ -34,6 +34,7 @@ module \$lut (A, Y); parameter WIDTH = 0; parameter LUT = 0; + (* force_downto *) input [WIDTH-1:0] A; output Y; diff --git a/techlibs/efinix/efinix_fixcarry.cc b/techlibs/efinix/efinix_fixcarry.cc index 1a1733a17..486b8e89c 100644 --- a/techlibs/efinix/efinix_fixcarry.cc +++ b/techlibs/efinix/efinix_fixcarry.cc @@ -90,7 +90,7 @@ static void fix_carry_chain(Module *module) struct EfinixCarryFixPass : public Pass { EfinixCarryFixPass() : Pass("efinix_fixcarry", "Efinix: fix carry chain") { } - void help() YS_OVERRIDE + void help() override { // |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---| log("\n"); @@ -99,7 +99,7 @@ struct EfinixCarryFixPass : public Pass { log("Add Efinix adders to fix carry chain if needed.\n"); log("\n"); } - void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE + void execute(std::vector<std::string> args, RTLIL::Design *design) override { log_header(design, "Executing EFINIX_FIXCARRY pass (fix invalid carry chain).\n"); diff --git a/techlibs/efinix/efinix_gbuf.cc b/techlibs/efinix/efinix_gbuf.cc index 55dfb3c79..ae191359a 100644 --- a/techlibs/efinix/efinix_gbuf.cc +++ b/techlibs/efinix/efinix_gbuf.cc @@ -87,7 +87,7 @@ static void handle_gbufs(Module *module) struct EfinixGbufPass : public Pass { EfinixGbufPass() : Pass("efinix_gbuf", "Efinix: insert global clock buffers") { } - void help() YS_OVERRIDE + void help() override { // |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---| log("\n"); @@ -96,7 +96,7 @@ struct EfinixGbufPass : public Pass { log("Add Efinix global clock buffers to top module as needed.\n"); log("\n"); } - void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE + void execute(std::vector<std::string> args, RTLIL::Design *design) override { log_header(design, "Executing efinix_gbuf pass (insert global clock buffers).\n"); diff --git a/techlibs/efinix/synth_efinix.cc b/techlibs/efinix/synth_efinix.cc index f9a7ef865..6ca44eed1 100644 --- a/techlibs/efinix/synth_efinix.cc +++ b/techlibs/efinix/synth_efinix.cc @@ -30,7 +30,7 @@ struct SynthEfinixPass : public ScriptPass { SynthEfinixPass() : ScriptPass("synth_efinix", "synthesis for Efinix FPGAs") { } - void help() YS_OVERRIDE + void help() override { // |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---| log("\n"); @@ -72,7 +72,7 @@ struct SynthEfinixPass : public ScriptPass string top_opt, edif_file, json_file; bool flatten, retime, nobram; - void clear_flags() YS_OVERRIDE + void clear_flags() override { top_opt = "-auto-top"; edif_file = ""; @@ -82,7 +82,7 @@ struct SynthEfinixPass : public ScriptPass nobram = false; } - void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE + void execute(std::vector<std::string> args, RTLIL::Design *design) override { string run_from, run_to; clear_flags(); @@ -137,7 +137,7 @@ struct SynthEfinixPass : public ScriptPass log_pop(); } - void script() YS_OVERRIDE + void script() override { if (check_label("begin")) { |