diff options
Diffstat (limited to 'techlibs/gowin/synth_gowin.cc')
| -rw-r--r-- | techlibs/gowin/synth_gowin.cc | 48 |
1 files changed, 26 insertions, 22 deletions
diff --git a/techlibs/gowin/synth_gowin.cc b/techlibs/gowin/synth_gowin.cc index dd965c0b8..4d1e968ae 100644 --- a/techlibs/gowin/synth_gowin.cc +++ b/techlibs/gowin/synth_gowin.cc @@ -29,7 +29,7 @@ struct SynthGowinPass : public ScriptPass { SynthGowinPass() : ScriptPass("synth_gowin", "synthesis for Gowin FPGAs") { } - void help() YS_OVERRIDE + void help() override { // |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---| log("\n"); @@ -69,9 +69,9 @@ struct SynthGowinPass : public ScriptPass log("\n"); log(" -noiopads\n"); log(" do not emit IOB at top level ports\n"); - //log("\n"); - //log(" -abc9\n"); - //log(" use new ABC9 flow (EXPERIMENTAL)\n"); + log("\n"); + log(" -abc9\n"); + log(" use new ABC9 flow (EXPERIMENTAL)\n"); log("\n"); log("\n"); log("The following commands are executed by this synthesis command:\n"); @@ -82,7 +82,7 @@ struct SynthGowinPass : public ScriptPass string top_opt, vout_file; bool retime, nobram, nolutram, flatten, nodffe, nowidelut, abc9, noiopads; - void clear_flags() YS_OVERRIDE + void clear_flags() override { top_opt = "-auto-top"; vout_file = ""; @@ -96,7 +96,7 @@ struct SynthGowinPass : public ScriptPass noiopads = false; } - void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE + void execute(std::vector<std::string> args, RTLIL::Design *design) override { string run_from, run_to; clear_flags(); @@ -144,10 +144,10 @@ struct SynthGowinPass : public ScriptPass nowidelut = true; continue; } - //if (args[argidx] == "-abc9") { - // abc9 = true; - // continue; - //} + if (args[argidx] == "-abc9") { + abc9 = true; + continue; + } if (args[argidx] == "-noiopads") { noiopads = true; continue; @@ -167,11 +167,11 @@ struct SynthGowinPass : public ScriptPass log_pop(); } - void script() YS_OVERRIDE + void script() override { if (check_label("begin")) { - run("read_verilog -lib +/gowin/cells_sim.v"); + run("read_verilog -specify -lib +/gowin/cells_sim.v"); run(stringf("hierarchy -check %s", help_mode ? "-top <top>" : top_opt.c_str())); } @@ -198,7 +198,7 @@ struct SynthGowinPass : public ScriptPass { run("memory_bram -rules +/gowin/lutrams.txt"); run("techmap -map +/gowin/lutrams_map.v"); - run("determine_init"); + run("setundef -params -zero t:RAM16S4"); } if (check_label("map_ffram")) @@ -219,10 +219,11 @@ struct SynthGowinPass : public ScriptPass if (check_label("map_ffs")) { - run("dff2dffs -match-init"); run("opt_clean"); - if (!nodffe) - run("dff2dffe -direct-match $_DFF_* -direct-match $__DFFS_*"); + if (nodffe) + run("dfflegalize -cell $_DFF_?_ 0 -cell $_SDFF_?P?_ r -cell $_DFF_?P?_ r"); + else + run("dfflegalize -cell $_DFF_?_ 0 -cell $_DFFE_?P_ 0 -cell $_SDFF_?P?_ r -cell $_SDFFE_?P?P_ r -cell $_DFF_?P?_ r -cell $_DFFE_?P?P_ r"); run("techmap -map +/gowin/cells_map.v"); run("opt_expr -mux_undef"); run("simplemap"); @@ -230,13 +231,15 @@ struct SynthGowinPass : public ScriptPass if (check_label("map_luts")) { - /*if (nowidelut && abc9) { - run("abc9 -lut 4"); - } else*/ if (nowidelut && !abc9) { + if (nowidelut && abc9) { + run("read_verilog -icells -lib -specify +/abc9_model.v"); + run("abc9 -maxlut 4 -W 500"); + } else if (nowidelut && !abc9) { run("abc -lut 4"); - } else /*if (!nowidelut && abc9) { - run("abc9 -lut 4:8"); - } else*/ if (!nowidelut && !abc9) { + } else if (!nowidelut && abc9) { + run("read_verilog -icells -lib -specify +/abc9_model.v"); + run("abc9 -maxlut 8 -W 500"); + } else if (!nowidelut && !abc9) { run("abc -lut 4:8"); } run("clean"); @@ -252,6 +255,7 @@ struct SynthGowinPass : public ScriptPass run("iopadmap -bits -inpad IBUF O:I -outpad OBUF I:O " "-toutpad TBUF OEN:I:O -tinoutpad IOBUF OEN:O:I:IO", "(unless -noiopads)"); run("clean"); + run("autoname"); } if (check_label("check")) |