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-rwxr-xr-xtechlibs/intel/common/brams_map.v70
1 files changed, 34 insertions, 36 deletions
diff --git a/techlibs/intel/common/brams_map.v b/techlibs/intel/common/brams_map.v
index b9938fe95..d8413159d 100755
--- a/techlibs/intel/common/brams_map.v
+++ b/techlibs/intel/common/brams_map.v
@@ -31,44 +31,42 @@ module \$__M9K_ALTSYNCRAM_SINGLEPORT_FULL (CLK2, CLK3, A1ADDR, A1DATA, A1EN, B1A
CFG_DBITS == 36 ? 9:
'bx;
- localparam NUMWORDS = CFG_DBITS == 1 ? "8192":
- CFG_DBITS == 2 ? "4096":
- CFG_DBITS == 4 ? "2048":
- CFG_DBITS == 8 ? "1024":
- CFG_DBITS == 9 ? "1024":
- CFG_DBITS == 16 ? "512":
- CFG_DBITS == 18 ? "512":
- CFG_DBITS == 32 ? "256":
- CFG_DBITS == 36 ? "256":
+ localparam NUMWORDS = CFG_DBITS == 1 ? 8192:
+ CFG_DBITS == 2 ? 4096:
+ CFG_DBITS == 4 ? 2048:
+ CFG_DBITS == 8 ? 1024:
+ CFG_DBITS == 9 ? 1024:
+ CFG_DBITS == 16 ? 512:
+ CFG_DBITS == 18 ? 512:
+ CFG_DBITS == 32 ? 256:
+ CFG_DBITS == 36 ? 256:
'bx;
- /* Killing some stupid warnings and assignations*/
- /* generate
- if( MODE == 1 ) begin
- assign B1DATA_t = ({34{1'b0},B1DATA[0]});
- end
- endgenerate*/
- altsyncram #(.clock_enable_input_b ("ALTERNATE" ),
- .clock_enable_input_a ("ALTERNATE" ),
- .clock_enable_output_b ("NORMAL" ),
- .clock_enable_output_a ("NORMAL" ),
- .wrcontrol_aclr_a ("NONE" ),
- .indata_aclr_a ("NONE" ),
- .address_aclr_a ("NONE" ),
- .outdata_aclr_a ("NONE" ),
- .outdata_reg_a ("UNREGISTERED"),
- .operation_mode ("SINGLE_PORT" ),
- .intended_device_family ("CYCLONE IVE" ),
- .outdata_reg_a ("UNREGISTERED"),
- .lpm_type ("altsyncram" ),
- .init_type ("unused" ),
- .ram_block_type ("AUTO" ),
- .numwords_b ( NUMWORDS ),
- .numwords_a ( NUMWORDS ),
- .widthad_b ( CFG_ABITS ),
- .width_b ( CFG_DBITS ),
- .widthad_a ( CFG_ABITS ),
- .width_a ( CFG_DBITS )
+ altsyncram #(.clock_enable_input_b ("ALTERNATE" ),
+ .clock_enable_input_a ("ALTERNATE" ),
+ .clock_enable_output_b ("NORMAL" ),
+ .clock_enable_output_a ("NORMAL" ),
+ .wrcontrol_aclr_a ("NONE" ),
+ .indata_aclr_a ("NONE" ),
+ .address_aclr_a ("NONE" ),
+ .outdata_aclr_a ("NONE" ),
+ .outdata_reg_a ("UNREGISTERED"),
+ .operation_mode ("SINGLE_PORT" ),
+ .intended_device_family ("CYCLONE IVE" ),
+ .outdata_reg_a ("UNREGISTERED"),
+ .lpm_type ("altsyncram" ),
+ .init_type ("unused" ),
+ .ram_block_type ("AUTO" ),
+ .lpm_hint ("ENABLE_RUNTIME_MOD=NO"), // Forced value
+ .power_up_uninitialized ("FALSE"),
+ .read_during_write_mode_port_a ("NEW_DATA_NO_NBE_READ"), // Forced value
+ .width_byteena_a (1), // Forced value
+ .numwords_b ( NUMWORDS ),
+ .numwords_a ( NUMWORDS ),
+ .widthad_b ( CFG_ABITS ),
+ .width_b ( CFG_DBITS ),
+ .widthad_a ( CFG_ABITS ),
+ .width_a ( CFG_DBITS )
) _TECHMAP_REPLACE_ (
.data_a(B1DATA),
.address_a(B1ADDR),