diff options
Diffstat (limited to 'techlibs/intel_alm/common/alm_sim.v')
| -rw-r--r-- | techlibs/intel_alm/common/alm_sim.v | 156 |
1 files changed, 119 insertions, 37 deletions
diff --git a/techlibs/intel_alm/common/alm_sim.v b/techlibs/intel_alm/common/alm_sim.v index 979c51132..242f1003f 100644 --- a/techlibs/intel_alm/common/alm_sim.v +++ b/techlibs/intel_alm/common/alm_sim.v @@ -69,6 +69,22 @@ `default_nettype none +// Cyclone V LUT output timings (picoseconds): +// +// CARRY A B C D E F G +// COMBOUT - 605 583 510 512 - 97 400 (LUT6) +// COMBOUT - 602 583 457 510 302 93 483 (LUT7) +// SUMOUT 368 1342 1323 887 927 - 785 - +// CARRYOUT 71 1082 1062 866 813 - 1198 - + +// Arria V LUT output timings (picoseconds): +// +// CARRY A B C D E F G +// COMBOUT - 387 375 316 317 - 76 319 (LUT6) +// COMBOUT - 387 375 316 317 218 76 319 (LUT7) +// SUMOUT 249 744 732 562 576 - 511 - +// CARRYOUT 19 629 623 530 514 - 696 - + (* abc9_lut=2, lib_whitebox *) module MISTRAL_ALUT6(input A, B, C, D, E, F, output Q); @@ -76,12 +92,22 @@ parameter [63:0] LUT = 64'h0000_0000_0000_0000; `ifdef cyclonev specify - (A => Q) = 602; - (B => Q) = 584; + (A => Q) = 605; + (B => Q) = 583; (C => Q) = 510; - (D => Q) = 510; - (E => Q) = 339; - (F => Q) = 94; + (D => Q) = 512; + (E => Q) = 400; + (F => Q) = 97; +endspecify +`endif +`ifdef arriav +specify + (A => Q) = 387; + (B => Q) = 375; + (C => Q) = 316; + (D => Q) = 317; + (E => Q) = 319; + (F => Q) = 76; endspecify `endif `ifdef cyclone10gx @@ -107,11 +133,20 @@ parameter [31:0] LUT = 32'h0000_0000; `ifdef cyclonev specify - (A => Q) = 584; + (A => Q) = 583; (B => Q) = 510; - (C => Q) = 510; - (D => Q) = 339; - (E => Q) = 94; + (C => Q) = 512; + (D => Q) = 400; + (E => Q) = 97; +endspecify +`endif +`ifdef arriav +specify + (A => Q) = 375; + (B => Q) = 316; + (C => Q) = 317; + (D => Q) = 319; + (E => Q) = 76; endspecify `endif `ifdef cyclone10gx @@ -137,9 +172,17 @@ parameter [15:0] LUT = 16'h0000; `ifdef cyclonev specify (A => Q) = 510; - (B => Q) = 510; - (C => Q) = 339; - (D => Q) = 94; + (B => Q) = 512; + (C => Q) = 400; + (D => Q) = 97; +endspecify +`endif +`ifdef arriav +specify + (A => Q) = 316; + (B => Q) = 317; + (C => Q) = 319; + (D => Q) = 76; endspecify `endif `ifdef cyclone10gx @@ -164,8 +207,15 @@ parameter [7:0] LUT = 8'h00; `ifdef cyclonev specify (A => Q) = 510; - (B => Q) = 339; - (C => Q) = 94; + (B => Q) = 400; + (C => Q) = 97; +endspecify +`endif +`ifdef arriav +specify + (A => Q) = 316; + (B => Q) = 317; + (C => Q) = 76; endspecify `endif `ifdef cyclone10gx @@ -188,8 +238,14 @@ parameter [3:0] LUT = 4'h0; `ifdef cyclonev specify - (A => Q) = 339; - (B => Q) = 94; + (A => Q) = 400; + (B => Q) = 97; +endspecify +`endif +`ifdef arriav +specify + (A => Q) = 316; + (B => Q) = 76; endspecify `endif `ifdef cyclone10gx @@ -209,7 +265,12 @@ module MISTRAL_NOT(input A, output Q); `ifdef cyclonev specify - (A => Q) = 94; + (A => Q) = 97; +endspecify +`endif +`ifdef arriav +specify + (A => Q) = 76; endspecify `endif `ifdef cyclone10gx @@ -222,39 +283,60 @@ assign Q = ~A; endmodule -(* abc9_box, lib_whitebox *) -module MISTRAL_ALUT_ARITH(input A, B, C, D0, D1, (* abc9_carry *) input CI, output SO, (* abc9_carry *) output CO); +// Despite the abc9_carry attributes, this doesn't seem to stop ABC9 adding illegal fanout to the carry chain that nextpnr cannot handle. +// So we treat it as a total blackbox from ABC9's perspective for now. +// (* abc9_box, lib_whitebox *) +module MISTRAL_ALUT_ARITH(input A, B, C, D0, D1, /* (* abc9_carry *) */ input CI, output SO, /* (* abc9_carry *) */ output CO); parameter LUT0 = 16'h0000; parameter LUT1 = 16'h0000; `ifdef cyclonev specify - (A => SO) = 1283; - (B => SO) = 1167; - (C => SO) = 866; - (D0 => SO) = 756; - (D1 => SO) = 756; - (CI => SO) = 355; - (A => CO) = 950; - (B => CO) = 1039; - (C => CO) = 820; - (D0 => CO) = 1006; - (D1 => CO) = 1006; - (CI => CO) = 23; + (A => SO) = 1342; + (B => SO) = 1323; + (C => SO) = 927; + (D0 => SO) = 887; + (D1 => SO) = 785; + (CI => SO) = 368; + + (A => CO) = 1082; + (B => CO) = 1062; + (C => CO) = 813; + (D0 => CO) = 866; + (D1 => CO) = 1198; + (CI => CO) = 36; // Divided by 2 to account for there being two ALUT_ARITHs in an ALM) +endspecify +`endif +`ifdef arriav +specify + (A => SO) = 744; + (B => SO) = 732; + (C => SO) = 562; + (D0 => SO) = 576; + (D1 => SO) = 511; + (CI => SO) = 249; + + (A => CO) = 629; + (B => CO) = 623; + (C => CO) = 530; + (D0 => CO) = 514; + (D1 => CO) = 696; + (CI => CO) = 10; // Divided by 2 to account for there being two ALUT_ARITHs in an ALM) endspecify `endif `ifdef cyclone10gx specify - (A => SO) = 644; - (B => SO) = 477; - (C => SO) = 416; + (A => SO) = 644; + (B => SO) = 477; + (C => SO) = 416; (D0 => SO) = 380; (D1 => SO) = 431; (CI => SO) = 276; - (A => CO) = 525; - (B => CO) = 433; - (C => CO) = 712; + + (A => CO) = 525; + (B => CO) = 433; + (C => CO) = 712; (D0 => CO) = 653; (D1 => CO) = 593; (CI => CO) = 16; |