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-rw-r--r--techlibs/xilinx/synth_xilinx.cc8
1 files changed, 6 insertions, 2 deletions
diff --git a/techlibs/xilinx/synth_xilinx.cc b/techlibs/xilinx/synth_xilinx.cc
index 805ae8e6e..61895e032 100644
--- a/techlibs/xilinx/synth_xilinx.cc
+++ b/techlibs/xilinx/synth_xilinx.cc
@@ -110,7 +110,9 @@ struct SynthXilinxPass : public Pass
log(" dffsr2dff\n");
log(" dff2dffe\n");
log(" opt -full\n");
- log(" techmap -map +/techmap.v -map +/xilinx/arith_map.v -map +/xilinx/ff_map.v\n");
+ log(" simplemap t:$dff*\n");
+ log(" shregmap -tech xilinx\n");
+ log(" techmap -map +/techmap.v -map +/xilinx/arith_map.v +/xilinx/ff_map.v\n");
log(" opt -fast\n");
log("\n");
log(" map_luts:\n");
@@ -255,13 +257,15 @@ struct SynthXilinxPass : public Pass
Pass::call(design, "dff2dffe");
Pass::call(design, "opt -full");
+ Pass::call(design, "simplemap t:$dff*");
+ Pass::call(design, "shregmap -tech xilinx");
+
if (vpr) {
Pass::call(design, "techmap -map +/techmap.v -map +/xilinx/arith_map.v -map +/xilinx/ff_map.v -D _EXPLICIT_CARRY");
} else {
Pass::call(design, "techmap -map +/techmap.v -map +/xilinx/arith_map.v -map +/xilinx/ff_map.v");
}
- Pass::call(design, "hierarchy -check");
Pass::call(design, "opt -fast");
}