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-rw-r--r--techlibs/xilinx/synth_xilinx.cc3
1 files changed, 0 insertions, 3 deletions
diff --git a/techlibs/xilinx/synth_xilinx.cc b/techlibs/xilinx/synth_xilinx.cc
index 7dbd98055..c24f66e52 100644
--- a/techlibs/xilinx/synth_xilinx.cc
+++ b/techlibs/xilinx/synth_xilinx.cc
@@ -62,9 +62,6 @@ struct SynthXilinxPass : public ScriptPass
log(" generate an output netlist (and BLIF file) suitable for VPR\n");
log(" (this feature is experimental and incomplete)\n");
log("\n");
- log(" -nocarry\n");
- log(" disable inference of carry chains\n");
- log("\n");
log(" -nobram\n");
log(" disable inference of block rams\n");
log("\n");